llvm::GIntBinOp

Represents an integer binary operation.

Synopsis

Declared in <llvm/CodeGen/GlobalISel/GenericMachineInstrs.h>

class GIntBinOp
    : public GBinOp

Base Classes

NameDescription
GBinOpRepresents a binary operation, i.e, x = y op z.

Type Aliases

NameDescription
AsmPrinterFlagTy Underlying integer type for AsmPrinter CommentFlag bit values.
const_mop_iterator Const iterator over this instruction's machine operands.
const_mop_range Const iterator range over machine operands.
filtered_const_mop_range Filtered const operand range (e.g. all_defs / all_uses).
filtered_mop_range Filtered mutable operand range (e.g. all_defs / all_uses).
mmo_iterator Iterator over MachineMemOperand pointers attached to an instruction.
mop_iterator iterator/begin/end - Iterate over all operands of a machine instruction.
mop_range Mutable iterator range over machine operands.

Enums

NameDescription
CommentFlag Flags to specify different kinds of comments to output in assembly code. These flags carry semantic information not otherwise easily derivable from the IR text.
MICheckType Controls which operands are compared by isIdenticalTo.
MIFlag Semantic flags carried on a MachineInstr beyond the MCInstrDesc.
QueryType How property queries treat instruction bundles.

Member Functions

NameDescription
operator= [deleted]Assignment is deleted; MachineInstr is not copyable.
addImplicitDefUseOperands Add all implicit def and use operands to this instruction.
addMemOperand Append MachineMemOperand MO to this instruction's memref list.
addOperand addOperand overloads
addRegisterDead Mark the operand that defines Reg as dead.
addRegisterDefined Ensure this instruction has an operand that defines Reg.
addRegisterKilled Mark the operand that uses IncomingReg as a kill.
allDefsAreDead Return true if all the defs of this instruction are dead.
allImplicitDefsAreDead Return true if all the implicit defs of this instruction are dead.
all_defs Return a range over all explicit or implicit register def operands.
all_uses Return a range over all explicit or implicit register use operands.
bundleWithPred Bundle this instruction with its predecessor. This can be an unbundled instruction, or it can be the first instruction in a bundle.
bundleWithSucc Bundle this instruction with its successor. This can be an unbundled instruction, or it can be the last instruction in a bundle.
canFoldAsLoad Return true if this instruction can be folded as a memory operand.
changeDebugValuesDefReg Retarget DBG_VALUEs that refer to this instruction's def to Reg.
clearAsmPrinterFlag Clear AsmPrinter flag Flag.
clearAsmPrinterFlags Clear the AsmPrinter bitvector.
clearFlag Clear MI flag Flag.
clearFlags Clear the MI flags bits specified by flags.
clearKillInfo Clears kill flags on all operands.
clearRegisterDeads Clear all dead flags on operands defining register Reg.
clearRegisterKills Clear all kill flags affecting Reg (and aliases if RegInfo is set).
cloneInstrSymbols Clone another instruction's pre- and post-instruction symbols onto this.
cloneMemRefs Replace our memrefs with a clone of MI's memref list.
cloneMergedMemRefs Replace our memrefs with the merged memrefs of instructions in MIs.
collectDebugValues Collect matching DBG_VALUEs that immediately follow this instruction.
copyIRFlags Copy IR flags from instruction I into this MachineInstr's MIFlags.
copyImplicitOps Copy implicit register operands from MI onto this instruction.
debug_operands Return operands that determine the variable location for this debug value.
definesRegister Return true if this instruction fully defines Reg.
defs Return all explicit register definition operands (implicits excluded).
dropDebugNumber Drop variable-location debugging information associated with this instruction.
dropMemRefs Clear this instruction's memory reference descriptor list.
dropPoisonGeneratingFlags Clear all poison-generating flags on this instruction.
dump Dump this instruction to dbgs().
dumpr Dump this instruction and defining instructions up to MaxDepth.
emitGenericError Emit an error referring to this instruction's source location if available.
emitInlineAsmError Emit an error at this instruction's source location for impossible inline asm.
eraseFromBundle Unlink 'this' from its basic block and delete it.
eraseFromParent Unlink 'this' from the containing basic block and delete it.
explicit_operands explicit_operands overloads
explicit_uses explicit_uses overloads
findFirstPredOperandIdx Find the index of the first predicate operand, or -1 if none.
findInlineAsmFlagIdx Find the inline-asm flag-word operand index for operand OpIdx.
findRegisterDefOperand findRegisterDefOperand overloads
findRegisterDefOperandIdx Return the operand index that defines Reg, or -1 if not found.
findRegisterUseOperand findRegisterUseOperand overloads
findRegisterUseOperandIdx Return the operand index that uses Reg, or -1 if not found.
findTiedOperandIdx Return the index of the operand tied to register operand OpIdx.
getAsmPrinterFlag Return whether AsmPrinter flag Flag is set.
getAsmPrinterFlags Return the asm printer flags bitvector.
getBundleSize Return the number of instructions inside this bundle, excluding the header.
getCFIType Helper to extract a CFI type hash if one has been added.
getDeactivationSymbol Return the deactivation symbol attached to this instruction, if any.
getDebugExpression Return the complex address expression referenced by this DBG_VALUE.
getDebugExpressionOp getDebugExpressionOp overloads
getDebugInstrNum getDebugInstrNum overloads
getDebugLabel Return the debug label referenced by this DBG_LABEL instruction.
getDebugLoc Returns the debug location of this MachineInstr.
getDebugOffset getDebugOffset overloads
getDebugOperand getDebugOperand overloads
getDebugOperandIndex Return the index of debug operand Op within debug_operands().
getDebugOperandsForReg getDebugOperandsForReg overloads
getDebugVariable Return the debug variable referenced by this DBG_VALUE instruction.
getDebugVariableOp getDebugVariableOp overloads
getDesc Returns the target instruction descriptor of this MachineInstr.
getFirst2LLTs Return the LLTs of the first two operands.
getFirst2RegLLTs Return the registers and LLTs of the first two operands.
getFirst2Regs Return the registers of the first two operands.
getFirst3LLTs Return the LLTs of the first three operands.
getFirst3RegLLTs Return the registers and LLTs of the first three operands.
getFirst3Regs Return the registers of the first three operands.
getFirst4LLTs Return the LLTs of the first four operands.
getFirst4RegLLTs Return the registers and LLTs of the first four operands.
getFirst4Regs Return the registers of the first four operands.
getFirst5LLTs Return the LLTs of the first five operands.
getFirst5RegLLTs Return the registers and LLTs of the first five operands.
getFirst5Regs Return the registers of the first five operands.
getFlag Return whether MI flag Flag is set.
getFlags Return the MI flags bitvector.
getFoldedRestoreSize Return a valid size if the instruction is a folded restore instruction.
getFoldedSpillSize Return a valid size if the instruction is a folded spill instruction.
getHeapAllocMarker Helper to extract a heap alloc marker if one has been added.
getInlineAsmDialect Return the inline assembly dialect used by this instruction.
getLHSReg Get the left-hand side register.
getLocCookieMD For inline asm, return the !srcloc metadata node if present.
getMF getMF overloads
getMMRAMetadata Helper to extract mmra.op metadata.
getNextNode Get the next node, or nullptr for the list tail.
getNumDebugOperands Returns the total number of operands which are debug locations.
getNumDefs Returns the total number of definitions (explicit and implicit).
getNumExplicitDefs Returns the number of non-implicit definitions.
getNumExplicitOperands Returns the number of non-implicit operands.
getNumImplicitOperands Returns the number of implicit operands.
getNumMemOperands Return the number of memory operands.
getNumOperands Return the total number of operands.
getOpcode Returns the opcode of this MachineInstr.
getOperand getOperand overloads
getOperandNo Return the operand index corresponding to iterator I.
getPCSections Helper to extract PCSections metadata target sections.
getParent getParent overloads
getPostInstrSymbol Helper to extract a post-instruction symbol if one has been added.
getPreInstrSymbol Helper to extract a pre-instruction symbol if one has been added.
getPrevNode getPrevNode overloads
getRHSReg Get the right-hand side register.
getReg Access the Idx'th operand as a register and return it.
getRegClassConstraint Compute the static register class constraint for operand OpIdx.
getRegClassConstraintEffect Apply operand OpIdx's constraints to register class CurRC.
getRegClassConstraintEffectForVReg Apply this instruction's constraints on Reg to class CurRC.
getRestoreSize Return a valid size if the instruction is a restore instruction.
getSpillSize Return a valid size if the instruction is a spill instruction.
getTypeToPrint Debugging support @{ Determine the generic type to print for operand OpIdx, if needed.
hasComplexRegisterTies Return true if this instruction has ties not implied by its descriptor.
hasDebugOperandForReg Return true if this debug value has a debug operand using Reg.
hasDelaySlot Return true if this instruction has a delay slot that must be filled.
hasExtraDefRegAllocReq Return true if defs have special regalloc requirements beyond classes.
hasExtraSrcRegAllocReq Return true if sources have special regalloc requirements beyond classes.
hasImplicitDef Returns true if the instruction has an implicit definition.
hasOneMemOperand Return true if this instruction has exactly one MachineMemOperand.
hasOptionalDef Return true if this instruction has an optional definition.
hasOrderedMemoryRef Return true if this may have an ordered/volatile memory reference.
hasPoisonGeneratingFlags Return true if this instruction has any poison-generating flags set.
hasPostISelHook Return true if this instruction needs a post-ISel target adjustment hook.
hasProperty Return true if this instruction (or its bundle) has property MCFlag.
hasRegisterImplicitUseOperand Return true if there is an implicit use of exactly register Reg.
hasUnmodeledSideEffects Return true if this instruction has side effects beyond mayLoad/mayStore.
implicit_operands implicit_operands overloads
insert Insert operands Ops before iterator InsertBefore.
isAnnotationLabel Return true if this is an ANNOTATION_LABEL instruction.
isAsCheapAsAMove Return true if this instruction costs no more than a move.
isBarrier Return true if this instruction stops fall-through to the next instruction.
isBitcast Return true if this instruction is a bitcast instruction.
isBranch Return true if this is a conditional, unconditional, or indirect branch.
isBundle Return true if this is a BUNDLE header instruction.
isBundled Return true if this instruction is part of a bundle.
isBundledWithPred Return true if this instruction is bundled with a predecessor.
isBundledWithSucc Return true if this instruction is bundled with a successor.
isCFIInstruction Return true if this is a CFI_INSTRUCTION.
isCall Return true if this is a call instruction.
isCandidateForAdditionalCallInfo Return true if this call may have additional call-site information.
isCommutable Return true if this instruction may be commutable (swap source operands).
isCompare Return true if this instruction is a comparison.
isConditionalBranch Return true if this branch may fall through or transfer to another block.
isConstantValuePHI If this PHI always merges the same virtual register, return that register.
isConvergent Return true if this instruction is convergent.
isConvertibleTo3Addr Return true if this 2-address instruction can become 3-address if needed.
isCopy Return true if this is a COPY instruction.
isCopyLaneMask Return true if this is a COPY_LANEMASK instruction.
isCopyLike Return true if this instruction behaves like a copy (excluding COPY).
isDead Return true if this instruction is dead.
isDebugEntryValue Return true if this DBG_VALUE is an entry value expression.
isDebugInstr Return true if this is any kind of debug instruction.
isDebugLabel Return true if this instruction's opcode is DBG_LABEL.
isDebugOffsetImm Return true if this non-list DBG_VALUE has an immediate offset operand.
isDebugOperand Return true if Op is one of this instruction's debug operands.
isDebugOrPseudoInstr Return true if this is a debug instruction or a pseudo probe.
isDebugPHI Return true if this is a DBG_PHI instruction.
isDebugRef Return true if this instruction's opcode is DBG_INSTR_REF.
isDebugValue Return true if the instruction is a DBG_VALUE or DBG_VALUE_LIST.
isDebugValueLike Return true if this is a debug value or debug instruction reference.
isDebugValueList Return true if this is a DBG_VALUE_LIST instruction.
isDereferenceableInvariantLoad Return true if this load never traps and reads invariant memory.
isEHLabel Return true if this is an EH_LABEL instruction.
isEHScopeReturn Return true if this marks the end of an EH scope (catchpad/cleanuppad).
isEquivalentDbgInstr Return true if this debug instruction represents the same value as Other.
isExtractSubreg Return true if this is an EXTRACT_SUBREG instruction.
isExtractSubregLike Return true if this behaves like a generic EXTRACT_SUBREG.
isFakeUse Return true if this is a FAKE_USE instruction.
isFullCopy Return true if this is a COPY with no subregister on either operand.
isGCLabel Return true if this is a GC_LABEL instruction.
isIdenticalTo Return true if this instruction is identical to Other.
isIdentityCopy Return true if this is an identity copy (same reg and subreg).
isImplicitDef Return true if this is an IMPLICIT_DEF instruction.
isIndirectBranch Return true if this is an indirect branch (e.g. through a register).
isIndirectDebugValue Return true if this DBG_VALUE is indirect (reg location + imm offset).
isInlineAsm Return true if this is an INLINEASM or INLINEASM_BR instruction.
isInsertSubreg Return true if this is an INSERT_SUBREG instruction.
isInsertSubregLike Return true if this behaves like a generic INSERT_SUBREG.
isInsideBundle Return true if MI is in a bundle (but not the first MI in a bundle).
isJumpTableDebugInfo Return true if this is a JUMP_TABLE_DEBUG_INFO instruction.
isKill Return true if this is a KILL instruction.
isLabel Returns true if the MachineInstr represents a label.
isLifetimeMarker Return true if this is a LIFETIME_START or LIFETIME_END marker.
isLoadFoldBarrier Returns true if it is illegal to fold a load across this instruction.
isMetaInstruction Return true if this instruction produces no executable output.
isMoveImmediate Return true if this is a move-immediate (including conditional moves).
isMoveReg Return true if this instruction is a register move.
isNonListDebugValue Return true if this is a non-list DBG_VALUE instruction.
isNotDuplicable Return true if this instruction cannot be safely duplicated.
isOperandSubregIdx Return true if operand OpIdx is a subregister index.
isPHI Return true if this is a PHI or G_PHI instruction.
isPosition Return true if the instruction marks a position in the function.
isPreISelOpcode Return true if this opcode should go through usual legalization steps.
isPredicable Return true if this instruction has a predicate operand.
isPseudo Return true if this is a pseudo instruction (not a real machine insn).
isPseudoProbe Return true if this is a PSEUDO_PROBE instruction.
isRegSequence Return true if this is a REG_SEQUENCE instruction.
isRegSequenceLike Return true if this behaves like a generic REG_SEQUENCE.
isRegTiedToDefOperand Return true if use operand UseOpIdx is tied to a def operand.
isRegTiedToUseOperand Return true if def operand DefOpIdx is tied to a use operand.
isRematerializable Return true if this instruction is a rematerialization candidate.
isReturn Return true if this is a return instruction.
isSafeToMove Return true if it is safe to move this instruction.
isSelect Return true if this instruction is a select instruction.
isStackAligningInlineAsm Return true if this is inline asm that requests stack alignment.
isSubregToReg Return true if this is a SUBREG_TO_REG instruction.
isTerminator Return true if this instruction is part of a basic-block terminator.
isTransient Return true if this instruction is transient (likely eliminated / free).
isUnconditionalBranch Return true if this branch always transfers control to another block.
isUndefDebugValue Return true if this debug value describes part of a variable as unavailable.
isVariadic Return true if this instruction can have a variable number of operands.
killsRegister Return true if this instruction kills Reg.
mayAlias mayAlias overloads
mayFoldInlineAsmRegOp Return true if register operand OpId may fold into a frame index.
mayLoad Return true if this instruction could possibly read memory.
mayLoadOrStore Return true if this instruction could possibly read or modify memory.
mayRaiseFPException Return true if this instruction could raise a floating-point exception.
mayStore Return true if this instruction could possibly modify memory.
memoperands Return this instruction's memory operands.
memoperands_begin Return a begin iterator over this instruction's memory operands.
memoperands_empty Return true if this instruction has no describing memory operands.
memoperands_end Return a past-the-end iterator over this instruction's memory operands.
mergeFlagsWith Return the MIFlags that represent both this instruction and Other.
modifiesRegister Return true if this instruction modifies (fully or partially) Reg.
moveBefore Move this instruction before MovePos.
operands operands overloads
operands_begin operands_begin overloads
operands_end operands_end overloads
peekDebugInstrNum Examine this instruction's debug number without assigning one.
print print overloads
readsRegister Return true if this instruction reads Reg.
readsVirtualRegister Return true if this instruction reads virtual register Reg.
readsWritesVirtualRegister Return whether this instruction reads and/or writes virtual register Reg.
registerDefIsDead Return true if Reg is dead in this instruction.
removeFromBundle Unlink this instruction from its basic block and return it without deleting it.
removeFromParent Unlink this instruction from its basic block and return it without deleting.
removeOperand Erase operand OpNo, leaving the instruction with one fewer operand.
removePHIIncomingValueFor Remove all PHI incoming values from basic block MBB.
setAsmPrinterFlag Set AsmPrinter flag Flag.
setCFIType Set the CFI type hash for this instruction.
setDeactivationSymbol Set the deactivation symbol value attached to this instruction.
setDebugInstrNum Set this instruction's debug instruction number.
setDebugLoc Replace this instruction's debug location with DL.
setDebugValueUndef Sets all register debug operands in this debug value instruction to be undef.
setDesc Replace this instruction's descriptor (and thus opcode) with TID.
setFlag Set MI flag Flag.
setFlags Set MI flags from bitvector flags, preserving bundle flags.
setHeapAllocMarker Set a heap-alloc site marker used to emit labels after ISel/opts.
setMMRAMetadata Set mmra.op metadata on this instruction.
setMemRefs Assign this instruction's memory reference descriptor list.
setPCSections Set metadata naming sections that should receive this instruction address.
setPhysRegsDeadExcept Mark every physreg used by this instruction dead except UsedRegs.
setPostInstrSymbol Set a symbol emitted immediately after this instruction.
setPreInstrSymbol Set a symbol emitted immediately before this instruction.
setRegisterDefReadUndef Mark subregister defs of Reg with the undef flag.
shouldUpdateAdditionalCallInfo Return true if additional call-site info must be updated for this MI.
substituteRegister Replace all occurrences of FromReg with ToRegSubIdx.
tieOperands Tie register operands at DefIdx and UseIdx to the same physreg.
unbundleFromPred Break bundle above this instruction.
unbundleFromSucc Break bundle below this instruction.
untieRegOperand Break any tie involving operand index OpIdx.
uses Return operands that may be register uses (may include non-reg operands).
usesCustomInsertionHook Return true if DAG scheduling needs a custom insertion hook for this.
wouldBeTriviallyDead Return true if this would be trivially dead if all defined regs were dead.

Static Member Functions

NameDescription
classof Methods for support type inquiry through isa, cast, and dyn_cast.
copyFlagsFromInstruction Build MIFlags bits corresponding to the IR flags on instruction I.

Non-Member Functions

NameDescription
AnalyzePhysRegInBundleAnalyze how the current instruction or bundle uses a physical register.
AnalyzeVirtRegInBundleAnalyze how the current instruction or bundle uses a virtual register.
AnalyzeVirtRegLanesInBundleReturn a pair of lane masks (reads, writes) indicating which lanes this instruction uses with Reg.
canLowerMemCpyFamilyMatcher for memcpy-like instructions. For non-zero lengths, MemOps contains the load/store types to emit.
const_mi_bundle_opsReturn a range over all operands in the const bundle containing MI.
constrainSelectedInstRegOperandsConstrain selected-instruction operands to the instruction register classes.
eraseInstrErase a single dead instruction, optionally notifying a debug observer.
getIConstantSplatSExtValReturn the scalar sign-extended integral splat value defined by MI if possible.
getIConstantSplatValReturn the scalar integral splat value defined by MI if possible.
getSplatIndexReturn the splat index of a G_SHUFFLE_VECTOR when it is a splat.
getVectorSplatExamples:
isAllOnesOrAllOnesSplatReturn true if the value is a constant -1 integer or a splatted vector of a constant -1 integer (with no undefs if AllowUndefs is false).
isAssertMIReturns true if the instruction MI is one of the assert instructions.
isBuildVectorAllOnesReturn true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are ~0 or undef.
isBuildVectorAllZerosReturn true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are 0 or undef.
isBuildVectorConstantSplatReturn true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are SplatValue or undef.
isBuildVectorConstantSplatReturn true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are SplatValue or undef.
isConstantOrConstantVectorReturn true if the specified instruction is known to be a constant, or a vector of constants.
isConstantOrConstantVectorDetermines if MI defines a constant integer or a build vector of constant integers. Treats undef values as constants.
isNullOrNullSplatReturn true if the value is a constant 0 integer or a null splat.
isTriviallyDeadCheck whether an instruction MI is dead: it only defines dead virtual registers, and doesn't have other side effects.
mi_bundle_opsReturn a range over all operands in the bundle containing MI.
phys_regs_and_masksReturns an iterator range over all physical register and mask operands for MI and bundled instructions. This also skips any debug operands.
saveUsesAndEraseRecord uses of MI and erase it, appending newly dead users to the chain.
stableHashValueCompute a stable hash of machine instruction MI.
updateDbgValueForSpillUpdate a DBG_VALUE whose value has been spilled to FrameIndex. Useful when modifying an instruction in place while iterating over a basic block.
GISelAddressing::aliasIsKnownForLoadStoreCompute whether or not a memory access at MI1 aliases with an access at MI2
GISelAddressing::instMayAliasReturns true if the instruction MI may alias Other.
MIPatternMatch::m_MInstrBinds the matched defining instruction to MI.
MIPatternMatch::m_MInstrBinds the matched defining instruction to const MI.
MIPatternMatch::mi_matchMatch const machine instruction MI against pattern P.
MIPatternMatch::mi_matchMatch machine instruction MI against pattern P.

Derived Classes

NameDescription
GAdd Represents an integer addition.
GMul Represents an integer multiplication.
GSub Represents an integer subtraction.