LSRWithInstrQueries [virtual] | Return true if LSR should use instruction-level TTI queries. |
addrspacesMayAlias | Return false if an AS0 address cannot possibly alias an AS1 address. |
adjustInliningThreshold | Return an additive adjustment to the inlining threshold for call CB. |
allowVectorElementIndexingUsingGEP [virtual] | Return true if vector element indexing via GEP is allowed. |
allowsMisalignedMemoryAccesses | Return true if the target supports misaligned memory accesses. |
areInlineCompatible | Return true if Caller and Callee have compatible inline attributes. |
areTypesABICompatible [virtual] | Return true if the types are ABI-compatible between caller and callee. |
canHaveNonUndefGlobalInitializerInAddressSpace [virtual] | Return true if globals in this address space may have non-undef initializers. |
canMacroFuseCmp [virtual] | Return true if the target can macro-fuse a compare and branch. |
canSaveCmp [virtual] | Return true if the target can save a loop-count compare. |
collectFlatAddressOperands | Collect flat-address operand indexes of intrinsic IID into OpIndexes. |
collectKernelLaunchBounds [virtual] | Collect kernel launch bounds metadata for the function. |
computeKnownBitsAddrSpaceCast | Compute known bits across an address-space cast. |
enableAggressiveInterleaving [virtual] | Return true if aggressive interleaved unrolling should be enabled. |
enableInterleavedAccessVectorization [virtual] | Return true if interleaved access vectorization is enabled. |
enableMaskedInterleavedAccessVectorization [virtual] | Return true if masked interleaved access vectorization is enabled. |
enableMemCmpExpansion [virtual] | Return options controlling expansion of memcmp-like operations. |
enableOrderedReductions [virtual] | Return true if ordered reductions should be enabled for this target. |
enableScalableVectorization [virtual] | Return true if scalable vectorization should be enabled. |
enableSelectOptimize [virtual] | Return true if the Select Optimization pass should run. |
enableWritePrefetching | Return true if prefetching should also be done for writes. |
forceScalarizeMaskedGather [virtual] | Return true if masked gathers must be scalarized for this type. |
forceScalarizeMaskedScatter [virtual] | Return true if masked scatters must be scalarized for this type. |
getAddrSpaceCastPreservedPtrMask [virtual] | Return a mask of pointer bits preserved by an address-space cast. |
getAddressComputationCost | Return the cost of address computation for a memory access. |
getAltInstrCost [virtual] | Estimate the cost of an alternating-opcode vector instruction. |
getArithmeticInstrCost | getArithmeticInstrCost overloads |
getArithmeticReductionCost | Calculate the cost of a vector arithmetic reduction. |
getAssumedAddrSpace | Return an address space the target assumes for pointer value V. |
getAtomicMemIntrinsicMaxElementSize [virtual] | Return the max element size for unordered-atomic memory intrinsics. |
getBranchMispredictPenalty | Return the estimated latency penalty of a branch misprediction. |
getCFInstrCost | Return the expected cost of a control-flow instruction. |
getCacheAssociativity | Return the associativity of cache level Level, if available. |
getCacheLineSize | Return the size of a cache line in bytes. |
getCacheSize | Return the size of cache level Level in bytes, if available. |
getCallInstrCost | Compute the cost of a call with the given signature. |
getCallerAllocaCost | Return the extra inlining threshold cost of leaving alloca AI in the caller. |
getCastInstrCost | getCastInstrCost overloads |
getCmpSelInstrCost | getCmpSelInstrCost overloads |
getCostOfKeepingLiveOverCall [virtual] | Estimate the cost of keeping values of the given types live across a call. |
getDataLayout [virtual] | Return the data layout used by this TTI implementation. |
getEpilogueVectorizationMinVF | Return the minimum VF for which epilogue vectorization should be considered. |
getEstimatedNumberOfCaseClusters | getEstimatedNumberOfCaseClusters overloads |
getExtendedReductionCost | Return the cost of an extended reduction pattern. |
getExtractWithExtendCost | Return the expected cost of a sign- or zero-extended vector extract. |
getFPOpCost | Return the expected cost of supporting floating-point ops of type Ty. |
getFeatureMask [virtual] | Return the feature bitmask for multi-versioning of the function. |
getFlatAddressSpace | Return the flat address space used to optimize addrspacecasts, or ~0u. |
getGEPCost | Estimate the cost of a GEP when lowered. |
getGISelRematGlobalCost [virtual] | Return the GlobalISel cost of rematerializing a global value. |
getIndexedVectorInstrCostFromEnd | Return the cost of insert/extract Index lanes from the end of a vector. |
getInlineCallPenalty [virtual] | Return the call penalty used when evaluating inlining of a call. |
getInlinerVectorBonusPercent | Return the inliner bonus percent for vector-dense callers/callees. |
getInliningCostBenefitAnalysisProfitableMultiplier [virtual] | Return the profitable multiplier used by inlining cost-benefit analysis. |
getInliningCostBenefitAnalysisSavingsMultiplier [virtual] | Return the savings multiplier used by inlining cost-benefit analysis. |
getInliningLastCallToStaticBonus [virtual] | Return the bonus applied when inlining the last call to a static function. |
getInliningThresholdMultiplier | Return a multiplier applied to the inlining threshold for this target. |
getInsertExtractValueCost [virtual] | Estimate the cost of an insertvalue or extractvalue instruction. |
getInstructionCost [virtual] | Estimate the cost of a given IR user when lowered. |
getIntImmCodeSizeCost [virtual] | Estimate the code-size cost of materializing an integer immediate. |
getIntImmCost [virtual] | Estimate the cost of materializing an integer immediate of the type. |
getIntImmCostInst [virtual] | Estimate the cost of an integer immediate used by an instruction. |
getIntImmCostIntrin [virtual] | Estimate the cost of an integer immediate used by an intrinsic. |
getInterleavedMemoryOpCost | getInterleavedMemoryOpCost overloads |
getIntrinsicInstrCost | Return the cost of an intrinsic, analyzing real arguments when present. |
getLoadStoreVecRegBitWidth [virtual] | Return the vector register bit width used for load/store in the address space. |
getLoadVectorFactor [virtual] | Return the load vectorization factor capped for this target. |
getMaxInterleaveFactor | Return the maximum interleave factor transforms should try for this target. |
getMaxMemIntrinsicInlineSizeThreshold [virtual] | Return the max memcpy/memset size inlined as a sequence of loads and stores. |
getMaxNumArgs [virtual] | Return the maximum number of arguments supported for a call. |
getMaxPrefetchIterationsAhead | Return the maximum number of iterations to prefetch ahead. |
getMaxVScale | Return the architectural maximum vscale, if the target specifies one. |
getMaximumVF [virtual] | Return the maximum vectorization factor for the element width and opcode. |
getMemIntrinsicInstrCost | Return the cost of a memory intrinsic described by MICA. |
getMemcpyCost [virtual] | Estimate the cost of a memcpy intrinsic instruction. |
getMemcpyLoopLoweringType [virtual] | Return the type used to lower a memcpy loop iteration. |
getMemcpyLoopResidualLoweringType [virtual] | Append types used to lower residual bytes of a memcpy loop. |
getMemoryOpCost | getMemoryOpCost overloads |
getMinMaxReductionCost | Calculate the cost of min/max reduction operations. |
getMinPageSize [virtual] | Return the minimum page size in bytes, if known. |
getMinPrefetchStride | Return the minimum stride in bytes where software prefetching helps. |
getMinTripCountTailFoldingThreshold [virtual] | Return the minimum trip count for considering tail folding. |
getMinVectorRegisterBitWidth [virtual] | Return the minimum vector register bit width for this target. |
getMinimumLookupTableEntryBitWidth [virtual] | Return the minimum integer bit width for switch lookup table entries. |
getMinimumVF [virtual] | Return the minimum vectorization factor for the element width. |
getMulAccReductionCost | Return the cost of a multiply-accumulate reduction pattern. |
getNumBytesToPadGlobalArray [virtual] | Return how many padding bytes to append to a global array. |
getNumberOfParts | Return how many pieces Tp must be split into during legalization. |
getNumberOfRegisters [virtual] | Return the number of registers in the given register class. |
getOperandsScalarizationOverhead | Estimate the overhead of scalarizing an instruction's operands. |
getOrCreateResultFromMemIntrinsic [virtual] | Return or create a value representing the result of a memory intrinsic. |
getOrderedReductionCost | Estimate the cost of a strict in-order (ordered) reduction. |
getPartialReductionCost | Return the cost of a partial reduction to a narrower vector. |
getPeelingPreferences | Fill PP with target preferences for peeling loop L. |
getPointersChainCost | Estimate the cost of a chain of related pointer values when lowered. |
getPopcntSupport [virtual] | Return how population-count is supported for the integer width. |
getPredicatedAddrSpace | Return a predicate value and address space assumed for pointer V. |
getPredictableBranchThreshold [virtual] | Return the probability threshold for treating a branch as predictable. |
getPreferredAddressingMode [virtual] | Return the preferred addressing mode for LSR to generate. |
getPreferredExpandedReductionShuffle [virtual] | Return the preferred shuffle strategy when expanding a reduction. |
getPreferredLargeGEPBaseOffset | Return a preferred large GEP base offset within []MinOffset, MaxOffset]. |
getPreferredTailFoldingStyle | Return the preferred style of tail folding for this target. |
getPrefetchDistance | Return how far before a load to place a prefetch, in instructions. |
getPriorityMask [virtual] | Return the priority bitmask for multi-versioning of the function. |
getRegUsageForType | Return the estimated number of registers required to represent Ty. |
getRegisterBitWidth | Return the bit width of the largest register of kind K. |
getRegisterClassForType [virtual] | Return the register class ID used for the type. |
getRegisterClassName [virtual] | Return a printable name for the register class ID. |
getRegisterClassReloadCost [virtual] | Estimate the cost of reloading a register into the class. |
getRegisterClassSpillCost [virtual] | Estimate the cost of spilling a register from the class. |
getReplicationShuffleCost | Return the cost of replicating VF elements of type EltTy. |
getScalarizationOverhead | getScalarizationOverhead overloads |
getScalingFactorCost | Return the cost of the scaling factor in addressing mode for type Ty. |
getShuffleCost | Return the cost of a shuffle producing DstTy from SrcTy. |
getStoreMinimumVF | Return a smaller store VF that may still be profitable to vectorize. |
getStoreVectorFactor [virtual] | Return the store vectorization factor capped for this target. |
getTgtMemIntrinsic [virtual] | Fill MemIntrinsicInfo for a target memory intrinsic, if recognized. |
getTreeReductionCost | Estimate arithmetic and shuffle costs for a tree-wise reduction. |
getTypeBasedIntrinsicInstrCost | Return an intrinsic cost based on argument types only. |
getTypeLegalizationCost | Estimate the cost of type-legalization and the legalized type. |
getUnrollingPreferences | Fill UP with target preferences for unrolling loop L. |
getVPLegalizationStrategy [virtual] | Return how vector-predicated operations should be legalized. |
getVScaleForTuning | Return the vscale value to use when tuning the cost model. |
getValueUniformity [virtual] | Return target-specific uniformity information for a value. |
getVectorInstrCost | getVectorInstrCost overloads |
getVectorSplitCost | Return the cost of splitting a vector into legal parts. |
hasActiveVectorLength [virtual] | Return true if the target has an active vector length mechanism. |
hasArmWideBranch [virtual] | Return true if the target has a wide ARM/Thumb branch. |
hasBranchDivergence | Return true if branch divergence exists for threads executing F. |
hasConditionalLoadStoreForType [virtual] | Return true if conditional load/store is available for the type. |
hasDivRemOp [virtual] | Return true if the target has a combined div/rem operation for the type. |
hasVolatileVariant [virtual] | Return true if the memory instruction has a volatile variant for the address space. |
haveFastClmul | Return true if the hardware has a fast carry-less multiply for Ty. |
haveFastSqrt | Return true if the hardware has a fast square-root for type Ty. |
improveShuffleKindFromMask | Refine Kind using Mask, updating Index and SubTy when needed. |
instCombineIntrinsic | Attempt target-specific InstCombine folds for intrinsic II. |
isElementTypeLegalForScalableVector [virtual] | Return true if the element type is legal in a scalable vector. |
isExpensiveToSpeculativelyExecute [virtual] | Return true if the instruction is too expensive to speculate. |
isFCmpOrdCheaperThanFCmpZero | Return true if an ordered FP compare is cheaper than comparing against zero. |
isFPVectorizationPotentiallyUnsafe [virtual] | Return true if FP vectorization may be unsafe on this target. |
isHardwareLoopProfitable | Return true if converting loop L into a hardware loop looks profitable. |
isIndexedLoadLegal | isIndexedLoadLegal overloads |
isIndexedStoreLegal | isIndexedStoreLegal overloads |
isLSRCostLess | Return true if LSR cost C1 is lower than C2. |
isLegalAddImmediate | isLegalAddImmediate overloads |
isLegalAddScalableImmediate | Return true if adding scalable immediate Imm (times vscale) is legal. |
isLegalAddressingMode | Return true if the described addressing mode is legal for type Ty. |
isLegalAltInstr [virtual] | Return true if the alternating-opcode pattern can be lowered efficiently. |
isLegalBroadcastLoad [virtual] | Return true if the target supports broadcast loads of the given shape. |
isLegalICmpImmediate | isLegalICmpImmediate overloads |
isLegalInterleavedAccessType [virtual] | Return true if interleaved access is legal for the given vector type. |
isLegalMaskedCompressStore [virtual] | Return true if the target supports masked compress stores. |
isLegalMaskedExpandLoad [virtual] | Return true if the target supports masked expand loads. |
isLegalMaskedGather [virtual] | Return true if the target supports masked gather of the given type. |
isLegalMaskedLoad [virtual] | Return true if the target supports masked loads of the given type. |
isLegalMaskedScatter [virtual] | Return true if the target supports masked scatter of the given type. |
isLegalMaskedStore [virtual] | Return true if the target supports masked stores of the given type. |
isLegalMaskedVectorHistogram [virtual] | Return true if the target supports masked vector histogram updates. |
isLegalNTLoad [virtual] | Return true if the target supports nontemporal loads of the given type. |
isLegalNTStore [virtual] | Return true if the target supports nontemporal stores of the given type. |
isLegalStridedLoadStore [virtual] | Return true if the target supports strided load/store of the given type. |
isLegalToVectorizeLoad [virtual] | Return true if the load may be vectorized. |
isLegalToVectorizeLoadChain [virtual] | Return true if a load chain of the given size may be vectorized. |
isLegalToVectorizeReduction [virtual] | Return true if the reduction may be vectorized at the given VF. |
isLegalToVectorizeStore [virtual] | Return true if the store may be vectorized. |
isLegalToVectorizeStoreChain [virtual] | Return true if a store chain of the given size may be vectorized. |
isLoweredToCall [virtual] | Return true if calls to the function lower to an actual call instruction. |
isMultiversionedFunction [virtual] | Return true if the function is multi-versioned. |
isNoopAddrSpaceCast | Return true if casting from FromAS to ToAS is a no-op. |
isNumRegsMajorCostOfLSR | Return true if register count is the major cost metric for LSR. |
isProfitableLSRChainElement | Return true if LSR should keep optimizing a chain that includes I. |
isProfitableToHoist | Return true if it is profitable to hoist I out of a then/else region. |
isProfitableToSinkOperands [virtual] | Return true if sinking the instruction's operands is profitable. |
isSingleThreaded | Return true if the target is configured for a single-threaded model. |
isTargetIntrinsicWithOverloadTypeAtArg | Return true if the vector intrinsic overloads on the type at OpdIdx. |
isTargetIntrinsicWithScalarOpAtArg | Return true if the vector form of the intrinsic has a scalar at ScalarOpdIdx. |
isTargetIntrinsicWithStructReturnOverloadAtField | Return true if a struct-returning target intrinsic overloads field RetIdx. |
isTruncateFree | Return true if truncating Ty1 to Ty2 is free on this target. |
isTypeLegal | Return true if Ty is a legal type for this target. |
isUniform [virtual] | Return true if the instruction is uniform given the uniform operand mask. |
isValidAddrSpaceCast | Return true if casting from FromAS to ToAS is valid on this target. |
isVectorShiftByScalarCheap [virtual] | Return true if vector shifts by a scalar amount are cheap. |
preferAlternateOpcodeVectorization [virtual] | Return true if alternating-opcode vectorization is preferred. |
preferEpilogueVectorization [virtual] | Return true if epilogue vectorization is preferred for the iteration count. |
preferFixedOverScalableIfEqualCost [virtual] | Return true if fixed vectors are preferred when costs are equal. |
preferInLoopReduction [virtual] | Return true if in-loop reductions are preferred for the recurrence. |
preferPredicatedReductionSelect [virtual] | Return true if predicated reduction selects are preferred. |
preferSLPInstCountCheck [virtual] | Return true if SLP should use the instruction-count profitability check. |
preferTailFoldingOverEpilogue | Return true if a tail-folded vector loop is preferred over a scalar epilogue. |
preferToKeepConstantsAttached | Return true if constants should stay attached to Inst for codegen quality. |
prefersVectorizedAddressing [virtual] | Return true if the target prefers addresses kept in vector form. |
rewriteIntrinsicWithAddressSpace | Rewrite intrinsic II replacing flat-address operand OldV with NewV. |
shouldBuildLookupTables | Return true if switches should be turned into lookup tables on this target. |
shouldBuildLookupTablesForConstant [virtual] | Return true if a switch on this constant may use a lookup table. |
shouldBuildRelLookupTables | Return true if lookup tables should use relative offsets on this target. |
shouldConsiderAddressTypePromotion [virtual] | Return true if address type promotion should be considered for the instruction. |
shouldConsiderVectorizationRegPressure [virtual] | Return true if register pressure should influence vectorization decisions. |
shouldCopyAttributeWhenOutliningFrom [virtual] | Return true if the attribute should be copied when outlining from the caller. |
shouldDropLSRSolutionIfLessProfitable | Return true if LSR should drop solutions worse than the baseline. |
shouldExpandReduction [virtual] | Return true if the reduction intrinsic should be expanded. |
shouldMaximizeVectorBandwidth [virtual] | Return true if vectorization should maximize bandwidth for the kind. |
shouldPrefetchAddressSpace | Return true if the target wants a prefetch in address space AS. |
shouldTreatInstructionLikeSelect [virtual] | Return true if the instruction should be treated like a select. |
simplifyDemandedUseBitsIntrinsic | Simplify a target intrinsic using demanded result bits. |
simplifyDemandedVectorEltsIntrinsic | Simplify a target intrinsic using demanded vector elements. |
supportsEfficientVectorElementLoadStore [virtual] | Return true if element-wise vector load/store is efficient. |
supportsScalableVectors [virtual] | Return true if the target supports scalable vectors. |
supportsTailCallFor [virtual] | Return true if the target supports a tail call for the given call site. |
supportsTailCalls [virtual] | Return true if the target supports tail calls. |
useAA | Return true if the target benefits from alias-analysis in codegen. |
useColdCCForColdCall [virtual] | Return true if cold calling convention should be used for cold calls. |
useFastCCForInternalCall [virtual] | Return true if fastcc should be used for internal calls. |