llvm::PeelingModuloScheduleExpander

Name

Description

PeelingModuloScheduleExpander [constructor]

Create a new PeelingModuloScheduleExpander.

expand

Expand the schedule by peeling prologs and epilogs from a rewritten kernel.

validateAgainstModuloScheduleExpander

Runs ModuloScheduleExpander and treats it as a golden input to validate aspects of the code generated by PeelingModuloScheduleExpander.

Name

Description

CreateLCSSAExitingBlock

Create an LCSSA‐style exiting block that clones kernel PHIs.

filterInstructions

Delete instructions whose stage is less than MinStage in block MB.

fixupBranches

Insert branches between prologs, kernel and epilogs.

getEquivalentRegisterIn

All prolog and epilog blocks are clones of the kernel, so any produced register in one block has an corollary in all other blocks.

getPhiCanonicalReg

Helper function to find the right canonical register for a phi instruction coming from a peeled out prologue.

getStage

Helper to get the stage of an instruction in the schedule.

moveStageBetweenBlocks

Move instructions of stage Stage from SourceBB to DestBB.

peelKernel

Peels one iteration of the rewritten kernel (BB) in the specified direction.

peelPrologAndEpilogs

Peel the kernel forwards and backwards to produce prologs and epilogs, and stitch them together.

rewriteKernel

Converts BB from the original loop body to the rewritten, pipelined steady‐state.

rewriteUsesOf

Change all users of MI, if MI is predicated out (LiveStages[MI‐>getParent()]== false).

Name

Description

AvailableStages

For every block, the stages that are available. A stage can be available but not produced (in the epilog) or produced but not available (in the prolog).

BB

The original loop block that gets rewritten in‐place.

BlockMIs

Maps (block, canonical MI) to the corresponding MI in that block.

CanonicalMIs

CanonicalMIs and BlockMIs form a bidirectional map between any of the loop kernel clones.

Epilogs

All prolog and epilog blocks.

IllegalPhisToDelete

Illegal phis that need to be deleted once we re‐link stages.

LIS

Live interval information, or nullptr if unused.

LiveStages

For every block, the stages that are produced.

LoopInfo

Target loop info before kernel peeling.

MF

The machine function containing the schedule.

MRI

Register information for MF.

PeeledBack

State passed from peelKernel to peelPrologAndEpilogs().

PeeledFront

State passed from peelKernel to peelPrologAndEpilogs().

PhiNodeLoopIteration

When peeling the epilogue keep track of the distance between the phi nodes and the kernel.

Preheader

The original loop preheader.

Prologs

All prolog and epilog blocks.

ST

Subtarget information for MF.

Schedule

The schedule being expanded.

TII

Target instruction info from the subtarget.