llvm::Unnamed enum

The MatchTable is encoded as an array of bytes. Thus, opcodes are expected to be <255.

Synopsis

Declared in <llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h>

enum Unnamed enum;

Description

Operands can be variable‐sized, their size is always after their name in the docs, e.g. "Foo(4)" means that "Foo" takes 4 entries in the table, so 4 bytes. "Foo()"

As a general rule of thumb:

Instruction & Operand IDs are ULEB128
LLT IDs are 1 byte
Predicates and target opcodes, register and register class IDs are 2 bytes.
Indexes into the table are 4 bytes.
Inline constants are 8 bytes

Design notes:

Inst/Op IDs have to be LEB128 because some targets generate extremely long patterns which need more than 255 temporaries. We could just use 2 bytes everytime, but then some targets like X86/AMDGPU that have no need for it will pay the price all the time.

Members

Name

Description

GIM_Try

Begin a try‐block to attempt a match and jump to OnFail if it is unsuccessful. ‐ OnFail(4) ‐ The MatchTable entry at which to resume if the match fails.

GIM_Try_CheckFeatures

GIM_Try only if the feature bits match. ‐ OnFail(4) ‐ The MatchTable entry at which to resume if the match fails. ‐ Feature(2) ‐ Expected features

GIM_SwitchOpcode

Switch over the opcode on the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID ‐ LowerBound(2) ‐ numerically minimum opcode supported ‐ UpperBound(2) ‐ numerically maximum + 1 opcode supported ‐ Default(4) ‐ failure jump target ‐ JumpTable(4)... ‐ (UpperBound ‐ LowerBound) (at least 2) jump targets

GIM_SwitchType

Switch over the LLT on the specified instruction operand ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ LowerBound(2) ‐ numerically minimum Type ID supported ‐ UpperBound(2) ‐ numerically maximum + 1 Type ID supported ‐ Default(4) ‐ failure jump target ‐ JumpTable(4)... ‐ (UpperBound ‐ LowerBound) (at least 2) jump targets

GIM_SwitchTypeShape

Switch over the shape of an LLT on the specified instruction operand ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ LowerBound(2) ‐ numerically minimum Type ID supported ‐ UpperBound(2) ‐ numerically maximum + 1 Type ID supported ‐ Default(4) ‐ failure jump target ‐ JumpTable(4)... ‐ (UpperBound ‐ LowerBound) (at least 2) jump targets

GIM_RecordInsn

Record the specified instruction. The IgnoreCopies variant ignores COPY instructions. ‐ NewInsnID(ULEB128) ‐ Instruction ID to define ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index

GIM_RecordInsnIgnoreCopies

GIM_CheckOpcode

Check the opcode on the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Opc(2) ‐ Expected opcode

GIM_CheckOpcodeIsEither

Check the opcode on the specified instruction, checking 2 acceptable alternatives. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Opc(2) ‐ Expected opcode ‐ Opc(2) ‐ Alternative expected opcode

GIM_CheckNumOperands

Check the instruction has the right number of operands ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Ops(ULEB128) ‐ Expected number of operands

GIM_CheckNumOperandsLE

Check the instruction has a number of operands <= or >= than given number. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Ops(ULEB128) ‐ Number of operands

GIM_CheckNumOperandsGE

Check the instruction has a number of operands <= or >= than given number. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Ops(ULEB128) ‐ Number of operands

GIM_CheckI64ImmPredicate

Check an immediate predicate on the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Pred(2) ‐ The predicate to test

GIM_CheckAPIntImmPredicate

Check an immediate predicate on the specified instruction via an APInt. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Pred(2) ‐ The predicate to test

GIM_CheckAPFloatImmPredicate

Check a floating point immediate predicate on the specified instruction. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Pred(2) ‐ The predicate to test

GIM_CheckImmOperandPredicate

Check an immediate predicate on the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ Pred(2) ‐ The predicate to test

GIM_CheckLeafOperandPredicate

Check a leaf predicate on the specified instruction. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ Pred(2) ‐ The predicate to test

GIM_CheckAtomicOrdering

Check a memory operation has the specified atomic ordering. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Ordering(ULEB128) ‐ The AtomicOrdering value

GIM_CheckAtomicOrderingOrStrongerThan

Check a memory operation has the specified atomic ordering. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Ordering(ULEB128) ‐ The AtomicOrdering value

GIM_CheckAtomicOrderingWeakerThan

Check a memory operation has the specified atomic ordering. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ Ordering(ULEB128) ‐ The AtomicOrdering value

GIM_CheckMemorySizeEqualTo

Check the size of the memory access for the given machine memory operand. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ MMOIdx(ULEB128) ‐ MMO index ‐ Size(4) ‐ The size in bytes of the memory access

GIM_CheckMemoryAddressSpace

Check the address space of the memory access for the given machine memory operand. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ MMOIdx(ULEB128) ‐ MMO index ‐ NumAddrSpace(1) ‐ Number of valid address spaces ‐ AddrSpaceN(ULEB128) ‐ An allowed space of the memory access ‐ AddrSpaceN+1 ...

GIM_CheckMemoryAlignment

Check the minimum alignment of the memory access for the given machine memory operand. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ MMOIdx(ULEB128) ‐ MMO index ‐ MinAlign(1) ‐ Minimum acceptable alignment

GIM_CheckMemorySizeEqualToLLT

Check the size of the memory access for the given machine memory operand against the size of an operand. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ MMOIdx(ULEB128) ‐ MMO index ‐ OpIdx(ULEB128) ‐ The operand index to compare the MMO against

GIM_CheckMemorySizeLessThanLLT

GIM_CheckMemorySizeGreaterThanLLT

GIM_CheckIsBuildVectorAllOnes

Check if this is a vector that can be treated as a vector splat constant. This is valid for both G_BUILD_VECTOR as well as G_BUILD_VECTOR_TRUNC. For AllOnes refers to individual bits, so a ‐1 element. ‐ InsnID(ULEB128) ‐ Instruction ID

GIM_CheckIsBuildVectorAllZeros

GIM_CheckSimplePredicate

Check a trivial predicate which takes no arguments. This can be used by executors to implement custom flags that don't fit in target features. ‐ Pred(2) ‐ Predicate ID to check.

GIM_CheckCxxInsnPredicate

Check a generic C++ instruction predicate ‐ InsnID(ULEB128) ‐ Instruction ID ‐ PredicateID(2) ‐ The ID of the predicate function to call

GIM_CheckHasNoUse

Check if there's no use of the first result. ‐ InsnID(ULEB128) ‐ Instruction ID

GIM_CheckHasOneUse

Check if there's one use of the first result. ‐ InsnID(ULEB128) ‐ Instruction ID

GIM_CheckType

Check the type for the specified operand ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ Ty(1) ‐ Expected type

GIM_RootCheckType

GIM_CheckType but InsnID is omitted and defaults to zero.

GIM_CheckPointerToAny

Check the type of a pointer to any address space. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ SizeInBits(ULEB128) ‐ The size of the pointer value in bits.

GIM_CheckRegBankForClass

Check the register bank for the specified operand ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ RC(2) ‐ Expected register bank (specified as a register class)

GIM_RootCheckRegBankForClass

GIM_CheckRegBankForClass but InsnID is omitted and defaults to zero.

GIM_CheckComplexPattern

Check the operand matches a complex predicate ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ RendererID(2) ‐ The renderer to hold the result ‐ Pred(2) ‐ Complex predicate ID

GIM_CheckConstantInt

Check the operand is a specific integer ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ Val(8) Expected integer

GIM_CheckConstantInt8

Check the operand is a specific 8‐bit signed integer ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ Val(1) Expected integer

GIM_CheckLiteralInt

Check the operand is a specific literal integer (i.e. MO.isImm() or MO.isCImm() is true). ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ Val(8) ‐ Expected integer

GIM_CheckIntrinsicID

Check the operand is a specific intrinsic ID ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ IID(2) ‐ Expected Intrinsic ID

GIM_CheckCmpPredicate

Check the operand is a specific predicate ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ Pred(2) ‐ Expected predicate

GIM_CheckIsMBB

Check the specified operand is an MBB ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index

GIM_CheckIsImm

Check the specified operand is an Imm ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index

GIM_CheckIsSafeToFold

Checks if the matched instructions numbered [1, 1+N) can] be folded into the root (inst 0). ‐ Num(1)

GIM_CheckIsSameOperand

Check the specified operands are identical. The IgnoreCopies variant looks through COPY instructions before comparing the operands. The "All" variants check all operands starting from the index. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ OtherInsnID(ULEB128) ‐ Other instruction ID ‐ OtherOpIdx(ULEB128) ‐ Other operand index

GIM_CheckIsSameOperandIgnoreCopies

GIM_CheckAllSameOperand

GIM_CheckAllSameOperandIgnoreCopies

GIM_CheckCanReplaceReg

Check we can replace all uses of a register with another. ‐ OldInsnID(ULEB128) ‐ OldOpIdx(ULEB128) ‐ NewInsnID(ULEB128) ‐ NewOpIdx(ULEB128)

GIM_MIFlags

Check that a matched instruction has, or doesn't have a MIFlag.

GIM_MIFlagsNot

Check that a matched instruction has, or doesn't have a MIFlag.

GIM_RecordNamedOperand

Predicates with 'let PredicateCodeUsesOperands = 1' need to examine some named operands that will be recorded in RecordedOperands. Names of these operands are referenced in predicate argument list. Emitter determines StoreIdx(corresponds to the order in which names appear in argument list). ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ StoreIdx(ULEB128) ‐ Store location in RecordedOperands.

GIM_RecordRegType

Records an operand's register type into the set of temporary types. ‐ InsnID(ULEB128) ‐ Instruction ID ‐ OpIdx(ULEB128) ‐ Operand index ‐ TempTypeIdx(1) ‐ Temp Type Index, always negative.

GIM_Reject

Fail the current try‐block, or completely fail to match if there is no current try‐block.

GIR_MutateOpcode

Mutate an instruction ‐ NewInsnID(ULEB128) ‐ Instruction ID to define ‐ OldInsnID(ULEB128) ‐ Instruction ID to mutate ‐ NewOpcode(2) ‐ The new opcode to use

GIR_BuildMI

Build a new instruction ‐ InsnID(ULEB128) ‐ Instruction ID to define ‐ Opcode(2) ‐ The new opcode to use

GIR_BuildRootMI

GIR_BuildMI but InsnID is omitted and defaults to zero.

GIR_BuildConstant

Builds a constant and stores its result in a TempReg. ‐ TempRegID(ULEB128) ‐ Temp Register to define. ‐ Imm(8) ‐ The immediate to add

GIR_Copy

Copy an operand to the specified instruction ‐ NewInsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to copy from ‐ OpIdx(ULEB128) ‐ The operand to copy

GIR_RootToRootCopy

GIR_Copy but with both New/OldInsnIDs omitted and defaulting to zero.

GIR_CopyRemaining

Copies all operand starting from OpIdx in OldInsnID into the new instruction NewInsnID. ‐ NewInsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to copy from ‐ OpIdx(ULEB128) ‐ The first operand to copy

GIR_CopyOrAddZeroReg

Copy an operand to the specified instruction or add a zero register if the operand is a zero immediate. ‐ NewInsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to copy from ‐ OpIdx(ULEB128) ‐ The operand to copy ‐ ZeroReg(2) ‐ The zero register to use

GIR_CopySubReg

Copy an operand to the specified instruction ‐ NewInsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to copy from ‐ OpIdx(ULEB128) ‐ The operand to copy ‐ SubRegIdx(2) ‐ The subregister to copy

GIR_AddImplicitDef

Add an implicit register def to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ RegNum(2) ‐ The register to add ‐ Flags(2) ‐ Register Flags

GIR_AddImplicitUse

Add an implicit register use to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ RegNum(2) ‐ The register to add

GIR_AddRegister

Add an register to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ RegNum(2) ‐ The register to add ‐ Flags(2) ‐ Register Flags

GIR_AddIntrinsicID

Adds an intrinsic ID to the specified instruction. ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ IID(2) ‐ Intrinsic ID

GIR_SetImplicitDefDead

Marks the implicit def of a register as dead. ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ OpIdx(ULEB128) ‐ The implicit def operand index

GIR_SetMIFlags

Set or unset a MIFlag on an instruction.

GIR_UnsetMIFlags

Set or unset a MIFlag on an instruction.

GIR_CopyMIFlags

Copy the MIFlags of a matched instruction into an output instruction. The flags are OR'd together.

GIR_AddTempRegister

Add a temporary register to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ TempRegID(ULEB128) ‐ The temporary register ID to add ‐ TempRegFlags(2) ‐ The register flags to set

GIR_AddSimpleTempRegister

Add a temporary register to the specified instruction without setting any flags. ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ TempRegID(ULEB128) ‐ The temporary register ID to add

GIR_AddTempSubRegister

GIR_AddImm

Add an immediate to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ Imm(8) ‐ The immediate to add

GIR_AddImm8

Add signed 8 bit immediate to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ Imm(1) ‐ The immediate to add

GIR_AddCImm

Add an CImm to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ Ty(1) ‐ Type of the constant immediate. ‐ Imm(8) ‐ The immediate to add

GIR_ComplexRenderer

Render complex operands to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ RendererID(2) ‐ The renderer to call

GIR_ComplexSubOperandRenderer

Render sub‐operands of complex operands to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ RendererID(2) ‐ The renderer to call ‐ RenderOpID(ULEB128) ‐ The suboperand to render.

GIR_ComplexSubOperandSubRegRenderer

Render subregisters of suboperands of complex operands to the specified instruction ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ RendererID(2) ‐ The renderer to call ‐ RenderOpID(ULEB128) ‐ The suboperand to render ‐ SubRegIdx(2) ‐ The subregister to extract

GIR_CustomRenderer

Render operands to the specified instruction using a custom function ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to get the matched operand from ‐ RendererFnID(2) ‐ Custom renderer function to call

GIR_DoneWithCustomAction

Calls a C++ function that concludes the current match. The C++ function is free to return false and reject the match, or return true and mutate the instruction(s) (or do nothing, even). ‐ FnID(2) ‐ The function to call.

GIR_CustomOperandRenderer

Render operands to the specified instruction using a custom function, reading from a specific operand. ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to get the matched operand from ‐ OpIdx(ULEB128) ‐ Operand index in OldInsnID the render function should read from.. ‐ RendererFnID(2) ‐ Custom renderer function to call

GIR_CopyConstantAsSImm

Render a G_CONSTANT operator as a sign‐extended immediate. ‐ NewInsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to copy from The operand index is implicitly 1.

GIR_CopyFConstantAsFPImm

Render a G_FCONSTANT operator as a sign‐extended immediate. ‐ NewInsnID(ULEB128) ‐ Instruction ID to modify ‐ OldInsnID(ULEB128) ‐ Instruction ID to copy from The operand index is implicitly 1.

GIR_ConstrainOperandRC

Constrain an instruction operand to a register class. ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ OpIdx(ULEB128) ‐ Operand index ‐ RCEnum(2) ‐ Register class enumeration value

GIR_ConstrainSelectedInstOperands

Constrain an instructions operands according to the instruction description. ‐ InsnID(ULEB128) ‐ Instruction ID to modify

GIR_RootConstrainSelectedInstOperands

GIR_ConstrainSelectedInstOperands but InsnID is omitted and defaults to zero.

GIR_MergeMemOperands

Merge all memory operands into instruction. ‐ InsnID(ULEB128) ‐ Instruction ID to modify ‐ NumInsnID(1) ‐ Number of instruction IDs following this argument ‐ MergeInsnID(ULEB128)... ‐ One or more Instruction ID to merge into the result.

GIR_EraseFromParent

Erase from parent. ‐ InsnID(ULEB128) ‐ Instruction ID to erase

GIR_EraseRootFromParent_Done

Combines both a GIR_EraseFromParent 0 + GIR_Done

GIR_MakeTempReg

Create a new temporary register that's not constrained. ‐ TempRegID(ULEB128) ‐ The temporary register ID to initialize. ‐ Ty(1) ‐ Expected type

GIR_ReplaceReg

Replaces all references to a register from an instruction with another register from another instruction. ‐ OldInsnID(ULEB128) ‐ OldOpIdx(ULEB128) ‐ NewInsnID(ULEB128) ‐ NewOpIdx(ULEB128)

GIR_ReplaceRegWithTempReg

Replaces all references to a register with a temporary register. ‐ OldInsnID(ULEB128) ‐ OldOpIdx(ULEB128) ‐ TempRegIdx(ULEB128)

GIR_Done

A successful emission

GIR_Coverage

Increment the rule coverage counter. ‐ RuleID(4) ‐ The ID of the rule that was covered.

GIU_NumOpcodes

Keeping track of the number of the GI opcodes. Must be the last entry.

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