MCRegisterClass ‐ Base class of TargetRegisterClass.

Synopsis

Declared in <llvm/MC/MCRegisterInfo.h>

class MCRegisterClass;

Type Aliases

Member Functions

Name

Description

begin

begin/end ‐ Return all of the registers in this class.

contains

contains overloads

end

expensiveOrImpossibleToCopy

getCopyCost

getCopyCost ‐ Return the cost of copying a value between two registers in this class. A negative number means the register class is very expensive to copy e.g. status flag register classes.

getID

getID() ‐ Return the register class ID number.

getLaneMask

Returns the combination of all lane masks of register in this class. The lane masks of the registers are the combination of all lane masks of their subregisters. Returns 1 if there are no subregisters.

getNumRegs

getNumRegs ‐ Return the number of registers in this class.

getRegister

getRegister ‐ Return the specified register in the class.

getRegisters

getSizeInBits

Return the size of the physical register in bits if we are able to determine it. This always returns zero for registers of targets that use HW modes, as we need more information to determine the size of registers in such cases. Use TargetRegisterInfo to cover them.

getSubClassMask

I.e., the representation of the memory from left to right at the bit level looks like: [31 30 ... 1 0][ 63 62 ... 33 32]... [ XXX NumRegClasses NumRegClasses ‐ 1 ... ] Where the number represents the class ID and XXX bits that should be ignored.

getSuperRegIndices

Returns a 0‐terminated list of sub‐register indices that project some super‐register class into this register class. The list has an entry for each Idx such that:

hasSubClass

Return true if the specified TargetRegisterClass is a proper sub‐class of this TargetRegisterClass.

hasSubClassEq

Returns true if RC is a sub‐class of or equal to this class.

hasSuperClass

Return true if the specified MCRegisterClass is a proper super‐class of this MCRegisterClass.

hasSuperClassEq

Returns true if RC is a super‐class of or equal to this class.

isAllocatable

isAllocatable ‐ Return true if this register class may be used to create virtual registers.

isBaseClass

Return true if this register class has a defined BaseClassOrder.

superclasses

Returns a list of super‐classes. The classes are ordered by ID which is also a topological ordering from large to small classes. The list does NOT include the current class.

Data Members

Name

Description

Allocatable

AllocationPriority

Classes with a higher priority value are assigned first by register allocators using a greedy heuristic. The value is in the range [0,31].

BaseClass

CopyCost

CoveredBySubRegs

Whether a combination of subregisters can cover every register in the class. See also the CoveredBySubRegs description in Target.td.

GlobalPriority

HasDisjunctSubRegs

Whether the class supports two (or more) disjunct subregister indices.

ID

LaneMask

NameIdx

RegSetBegin

Register denoted by first bit in RegSet.

RegSetOff

Relative offset to uint8_t array.

RegSetSize

RegSizeInBits

RegsOff

Relative offset to MCPhysReg array.

RegsSize

SpillStackID

SubClassMaskOff

Relative offset to uint32_t array.

SuperClassesOff

Relative offset to unsigned array.

SuperClassesSize

SuperRegIndicesOff

Relative offset to MCPhysReg array.

TSFlags

Configurable target specific flags.

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