Create a bottom-up register-pressure-aware list scheduler that uses latency.
Declared in <llvm/CodeGen/SchedulerRegistry.h>
ScheduleDAGSDNodes*
createHybridListDAGScheduler(
SelectionDAGISel* IS,
CodeGenOptLevel OptLevel);In low register pressure mode, latency information is used to avoid stalls for long latency instructions. In high register pressure mode it schedules to reduce register pressure.
A new ScheduleDAGSDNodes using the hybrid latency/pressure heuristic.
| Name | Description |
|---|---|
| IS | Instruction selection pass owning the DAG to schedule. |
| OptLevel | Codegen optimization level. |