llvm::TargetLoweringBase::emitMaskedAtomicRMWIntrinsic

Synopsis

Declared in <llvm/CodeGen/TargetLowering.h>

virtual
Value*
emitMaskedAtomicRMWIntrinsic(
    IRBuilderBase& Builder,
    AtomicRMWInst* AI,
    Value* AlignedAddr,
    Value* Incr,
    Value* Mask,
    Value* ShiftAmt,
    AtomicOrdering Ord) const;

Description

Perform a masked atomicrmw using a target-specific intrinsic. This represents the core LL/SC loop which will be lowered at a late stage by the backend. The target-specific intrinsic returns the loaded value and is not responsible for masking and shifting the result.

Return Value

A pointer to the requested object, or null if unavailable.

Parameters

Name	Description
Builder	IR builder used to emit the intrinsic.
AI	Atomic RMW instruction being expanded.
AlignedAddr	Aligned address of the atomic memory location.
Incr	Increment or operand value for the RMW operation.
Mask	Bitmask selecting the relevant bits of the atomic value.
ShiftAmt	Shift amount used to position the masked bits.
Ord	Atomic ordering.