Create a bottom‐up register‐pressure‐aware list scheduler that favors ILP.
Synopsis
Declared in <llvm/CodeGen/SchedulerRegistry.h>
ScheduleDAGSDNodes*
createILPListDAGScheduler(
SelectionDAGISel* IS,
CodeGenOptLevel OptLevel);
Description
In low register pressure mode, it tries to increase instruction level parallelism. In high register pressure mode it schedules to reduce register pressure.
Return Value
A new ScheduleDAGSDNodes that favors ILP under low register pressure.
Parameters
Name |
Description |
IS |
Instruction selection pass owning the DAG to schedule. |
OptLevel |
Codegen optimization level. |
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