llvm::MCRegisterClass

Name

Description

const_iterator

Const iterator over physical registers in this class.

iterator

Iterator over physical registers in this class.

Name

Description

begin

begin/end ‐ Return all of the registers in this class.

contains

contains overloads

end

Return an iterator past the last register in this class.

expensiveOrImpossibleToCopy

Return true if copying this register class is very expensive or impossible.

getCopyCost

Return the cost of copying a value between two registers in this class.

getID

getID() ‐ Return the register class ID number.

getLaneMask

Return the combination of all lane masks of registers in this class.

getNumRegs

getNumRegs ‐ Return the number of registers in this class.

getRegister

getRegister ‐ Return the specified register in the class.

getRegisters

Return all physical registers in this class.

getSizeInBits

Return the size of the physical register in bits if we are able to determine it.

getSubClassMask

Returns a bit vector of subclasses, including this one.

getSuperRegIndices

Return the 0‐terminated list of super‐register indices into this class.

hasSubClass

Return true if the specified TargetRegisterClass is a proper sub‐class of this TargetRegisterClass.

hasSubClassEq

Returns true if RC is a sub‐class of or equal to this class.

hasSuperClass

Return true if the specified MCRegisterClass is a proper super‐class of this MCRegisterClass.

hasSuperClassEq

Returns true if RC is a super‐class of or equal to this class.

isAllocatable

isAllocatable ‐ Return true if this register class may be used to create virtual registers.

isBaseClass

Return true if this register class has a defined BaseClassOrder.

superclasses

Return the list of super‐classes of this register class.

Name

Description

Allocatable

True if virtual registers may use this class.

AllocationPriority

Classes with a higher priority value are assigned first by register allocators using a greedy heuristic. The value is in the range [0,31].

BaseClass

True if this class has a defined BaseClassOrder.

CopyCost

Cost of copying between registers in this class.

CoveredBySubRegs

Whether a combination of subregisters can cover every register in the class. See also the CoveredBySubRegs description in Target.td.

GlobalPriority

True to use the global allocation priority heuristic.

HasDisjunctSubRegs

Whether the class supports two (or more) disjunct subregister indices.

ID

Unique ID of this register class.

LaneMask

Combined lane mask of all registers in this class.

NameIdx

Index of this class's name in the string table.

RegSetBegin

Register denoted by first bit in RegSet.

RegSetOff

Relative offset to uint8_t array.

RegSetSize

Size of the membership bitset in bits.

RegSizeInBits

Size in bits of registers in this class.

RegsOff

Relative offset to MCPhysReg array.

RegsSize

Number of registers in this class.

SpillStackID

Stack ID used when spilling registers from this class.

SubClassMaskOff

Relative offset to uint32_t array.

SuperClassesOff

Relative offset to unsigned array.

SuperClassesSize

Number of entries in the super‐classes list.

SuperRegIndicesOff

Relative offset to MCPhysReg array.

TSFlags

Configurable target specific flags.