Only the RegisterBankInfo can initialize RegisterBank properly.
Declared in <llvm/CodeGen/RegisterBankInfo.h>
class RegisterBankInfo;
| Name | Description |
|---|---|
InstructionMapping | Helper class that represents how the value of an instruction may be mapped and what is the related cost of such mapping. |
OperandsMapper | Helper class used to get/create the virtual registers that will be used to replace the MachineOperand when applying a mapping. |
PartialMapping | Helper struct that represents how a value is partially mapped into a register. |
ValueMapping | Helper struct that represents how a value is mapped through different register banks. |
| Name | Description |
|---|---|
InstructionMappings | Convenient type to represent the alternatives for mapping an instruction. |
| Name | Description |
|---|---|
~RegisterBankInfo [destructor] [virtual] | Destroy a register bank info. |
applyMapping | Apply OpdMapper.getInstrMapping() to OpdMapper.getMI(). |
applyMappingImpl [virtual] | See ::applyMapping. |
cannotCopy | Return true if emitting a copy from Src to Dst is impossible. |
copyCost [virtual] | Get the cost of a copy from B to A. |
getBreakDownCost [virtual] | Get the cost of using ValMapping to decompose a register. |
getInstrAlternativeMappings [virtual] | Get the alternative mappings for MI. Alternative in the sense different from getInstrMapping. |
getInstrMapping [virtual] | Get the mapping of the different operands of MI on the register bank. |
getInstrPossibleMappings | Get the possible mappings for MI. |
getInstructionMapping | Method to get a uniquely generated InstructionMapping. |
getInvalidInstructionMapping | Method to get a uniquely generated invalid InstructionMapping. |
getMaximumSize | Get the maximum size in bits that fits in the given register bank. |
getNumRegBanks | Get the total number of register banks. |
getRegBank | getRegBank overloads |
getRegBankFromConstraints | Get the register bank for the OpIdx-th operand of MI form the encoding constraints, if any. |
getRegBankFromRegClass [virtual] | Get a register bank that covers RC. |
getSizeInBits | Get the size in bits of Reg. |
isDivergentRegBank [virtual] | Returns true if the register bank is considered divergent. |
verify | Check that information hold by this instance make sense for the given TRI. |
| Name | Description |
|---|---|
applyDefaultMapping | Apply a default-like mapping to OpdMapper. |
constrainGenericRegister | Constrain the (possibly generic) virtual register Reg to RC. |
| Name | Description |
|---|---|
DefaultMappingID | Identifier for instruction mappings generated by target-independent code. |
InvalidMappingID | Identifier used when the related instruction mapping instance is generated by the default constructor. Make sure not to use that identifier. |
| Name | Description |
|---|---|
RegisterBankInfo [constructor] | Constructors |
operator= [deleted] | Copy assignment is deleted; RegisterBankInfo is not copyable. |
getInstrMappingImpl | Try to get the mapping of MI. See getInstrMapping for more details on what a mapping represents. |
getMinimalPhysRegClass | Get the MinimalPhysRegClass for Reg. |
getOperandsMapping | getOperandsMapping overloads |
getPartialMapping | Get the uniquely generated PartialMapping for the given arguments. |
getRegBank | Get the register bank identified by ID. |
getValueMapping | getValueMapping overloads |
| Name | Description |
|---|---|
HwMode | Current HwMode for the target. |
MapOfInstructionMappings | Keep dynamically allocated InstructionMapping in a separate map. This shouldn't be needed when everything gets TableGen'ed. |
MapOfOperandsMappings | Keep dynamically allocated array of ValueMapping in a separate map. This shouldn't be needed when everything gets TableGen'ed. |
MapOfPartialMappings | Keep dynamically allocated PartialMapping in a separate map. This shouldn't be needed when everything gets TableGen'ed. |
MapOfValueMappings | Keep dynamically allocated ValueMapping in a separate map. This shouldn't be needed when everything gets TableGen'ed. |
NumRegBanks | Total number of register banks. |
PhysRegMinimalRCs | Getting the minimal register class of a physreg is expensive. Cache this information as we get it. |
RegBanks | Hold the set of supported register banks. |
Sizes | Hold the sizes of the register banks for all HwModes. |