[#llvm-GZExtLoad]
= xref:llvm.adoc[llvm]::GZExtLoad
:relfileprefix: ../
:mrdocs:

Represents a G_ZEXTLOAD.

== Synopsis

Declared in `<llvm/CodeGen/GlobalISel/GenericMachineInstrs.h>`

[source,cpp,subs="verbatim,replacements,macros,-callouts"]
----
class GZExtLoad
    : public xref:llvm/GExtLoad.adoc[GExtLoad]
----

== Base Classes

[cols="1,4"]
|===
| Name| Description
| `xref:llvm/GExtLoad.adoc[GExtLoad]`
| Represents either a G_SEXTLOAD, G_ZEXTLOAD, or G_FPEXTLOAD.
|===

== Type Aliases

[cols="1,4"]
|===
| Name| Description
| xref:llvm/MachineInstr/AsmPrinterFlagTy.adoc[`AsmPrinterFlagTy`] 
| Underlying integer type for AsmPrinter CommentFlag bit values.
| xref:llvm/MachineInstr/const_mop_iterator.adoc[`const_mop_iterator`] 
| Const iterator over this instruction's machine operands.
| xref:llvm/MachineInstr/const_mop_range.adoc[`const_mop_range`] 
| Const iterator range over machine operands.
| xref:llvm/MachineInstr/filtered_const_mop_range.adoc[`filtered_const_mop_range`] 
| Filtered const operand range (e.g. all_defs / all_uses).
| xref:llvm/MachineInstr/filtered_mop_range.adoc[`filtered_mop_range`] 
| Filtered mutable operand range (e.g. all_defs / all_uses).
| xref:llvm/MachineInstr/mmo_iterator.adoc[`mmo_iterator`] 
| Iterator over MachineMemOperand pointers attached to an instruction.
| xref:llvm/MachineInstr/mop_iterator.adoc[`mop_iterator`] 
| iterator/begin/end ‐ Iterate over all operands of a machine instruction.
| xref:llvm/MachineInstr/mop_range.adoc[`mop_range`] 
| Mutable iterator range over machine operands.
|===


== Enums

[cols="1,4"]
|===
| Name| Description
| xref:llvm/MachineInstr/CommentFlag.adoc[`CommentFlag`] 
| Flags to specify different kinds of comments to output in assembly code. These flags carry semantic information not otherwise easily derivable from the IR text.
| xref:llvm/MachineInstr/MICheckType.adoc[`MICheckType`] 
| Controls which operands are compared by isIdenticalTo.
| xref:llvm/MachineInstr/MIFlag.adoc[`MIFlag`] 
| Semantic flags carried on a MachineInstr beyond the MCInstrDesc.
| xref:llvm/MachineInstr/QueryType.adoc[`QueryType`] 
| How property queries treat instruction bundles.
|===


== Member Functions

[cols="1,4"]
|===
| Name| Description
| xref:llvm/MachineInstr/operator_assign.adoc[`operator=`]  [.small]#[deleted]#
| Assignment is deleted; MachineInstr is not copyable.
| xref:llvm/MachineInstr/addImplicitDefUseOperands.adoc[`addImplicitDefUseOperands`] 
| Add all implicit def and use operands to this instruction.
| xref:llvm/MachineInstr/addMemOperand.adoc[`addMemOperand`] 
| Append MachineMemOperand `MO` to this instruction's memref list.
| xref:llvm/MachineInstr/addOperand-02.adoc[`addOperand`] 
| `addOperand` overloads
| xref:llvm/MachineInstr/addRegisterDead.adoc[`addRegisterDead`] 
| Mark the operand that defines `Reg` as dead.
| xref:llvm/MachineInstr/addRegisterDefined.adoc[`addRegisterDefined`] 
| Ensure this instruction has an operand that defines `Reg.`
| xref:llvm/MachineInstr/addRegisterKilled.adoc[`addRegisterKilled`] 
| Mark the operand that uses `IncomingReg` as a kill.
| xref:llvm/MachineInstr/allDefsAreDead.adoc[`allDefsAreDead`] 
| Return true if all the defs of this instruction are dead.
| xref:llvm/MachineInstr/allImplicitDefsAreDead.adoc[`allImplicitDefsAreDead`] 
| Return true if all the implicit defs of this instruction are dead.
| xref:llvm/MachineInstr/all_defs-02.adoc[`all_defs`] 
| Return a range over all explicit or implicit register def operands.
| xref:llvm/MachineInstr/all_uses-0d.adoc[`all_uses`] 
| Return a range over all explicit or implicit register use operands.
| xref:llvm/MachineInstr/bundleWithPred.adoc[`bundleWithPred`] 
| Bundle this instruction with its predecessor. This can be an unbundled instruction, or it can be the first instruction in a bundle.
| xref:llvm/MachineInstr/bundleWithSucc.adoc[`bundleWithSucc`] 
| Bundle this instruction with its successor. This can be an unbundled instruction, or it can be the last instruction in a bundle.
| xref:llvm/MachineInstr/canFoldAsLoad.adoc[`canFoldAsLoad`] 
| Return true if this instruction can be folded as a memory operand.
| xref:llvm/MachineInstr/changeDebugValuesDefReg.adoc[`changeDebugValuesDefReg`] 
| Retarget DBG_VALUEs that refer to this instruction's def to `Reg.`
| xref:llvm/MachineInstr/clearAsmPrinterFlag.adoc[`clearAsmPrinterFlag`] 
| Clear AsmPrinter flag `Flag.`
| xref:llvm/MachineInstr/clearAsmPrinterFlags.adoc[`clearAsmPrinterFlags`] 
| Clear the AsmPrinter bitvector.
| xref:llvm/MachineInstr/clearFlag.adoc[`clearFlag`] 
| Clear MI flag `Flag.`
| xref:llvm/MachineInstr/clearFlags.adoc[`clearFlags`] 
| Clear the MI flags bits specified by `flags.`
| xref:llvm/MachineInstr/clearKillInfo.adoc[`clearKillInfo`] 
| Clears kill flags on all operands.
| xref:llvm/MachineInstr/clearRegisterDeads.adoc[`clearRegisterDeads`] 
| Clear all dead flags on operands defining register `Reg.`
| xref:llvm/MachineInstr/clearRegisterKills.adoc[`clearRegisterKills`] 
| Clear all kill flags affecting `Reg` (and aliases if `RegInfo` is set).
| xref:llvm/MachineInstr/cloneInstrSymbols.adoc[`cloneInstrSymbols`] 
| Clone another instruction's pre‐ and post‐instruction symbols onto this.
| xref:llvm/MachineInstr/cloneMemRefs.adoc[`cloneMemRefs`] 
| Replace our memrefs with a clone of `MI's` memref list.
| xref:llvm/MachineInstr/cloneMergedMemRefs.adoc[`cloneMergedMemRefs`] 
| Replace our memrefs with the merged memrefs of instructions in `MIs.`
| xref:llvm/MachineInstr/collectDebugValues.adoc[`collectDebugValues`] 
| Collect matching DBG_VALUEs that immediately follow this instruction.
| xref:llvm/MachineInstr/copyIRFlags.adoc[`copyIRFlags`] 
| Copy IR flags from instruction `I` into this MachineInstr's MIFlags.
| xref:llvm/MachineInstr/copyImplicitOps.adoc[`copyImplicitOps`] 
| Copy implicit register operands from `MI` onto this instruction.
| xref:llvm/MachineInstr/debug_operands-03.adoc[`debug_operands`] 
| Return operands that determine the variable location for this debug value.
| xref:llvm/MachineInstr/definesRegister.adoc[`definesRegister`] 
| Return true if this instruction fully defines `Reg.`
| xref:llvm/MachineInstr/defs-0d2.adoc[`defs`] 
| Return all explicit register definition operands (implicits excluded).
| xref:llvm/MachineInstr/dropDebugNumber.adoc[`dropDebugNumber`] 
| Drop variable‐location debugging information associated with this instruction.
| xref:llvm/MachineInstr/dropMemRefs.adoc[`dropMemRefs`] 
| Clear this instruction's memory reference descriptor list.
| xref:llvm/GenericMachineInstr/dropPoisonGeneratingFlags.adoc[`dropPoisonGeneratingFlags`] 
| Clear all poison‐generating flags on this instruction.
| xref:llvm/MachineInstr/dump.adoc[`dump`] 
| Dump this instruction to dbgs().
| xref:llvm/MachineInstr/dumpr.adoc[`dumpr`] 
| Dump this instruction and defining instructions up to `MaxDepth.`
| xref:llvm/MachineInstr/emitGenericError.adoc[`emitGenericError`] 
| Emit an error referring to this instruction's source location if available.
| xref:llvm/MachineInstr/emitInlineAsmError.adoc[`emitInlineAsmError`] 
| Emit an error at this instruction's source location for impossible inline asm.
| xref:llvm/MachineInstr/eraseFromBundle.adoc[`eraseFromBundle`] 
| Unlink 'this' from its basic block and delete it.
| xref:llvm/MachineInstr/eraseFromParent.adoc[`eraseFromParent`] 
| Unlink 'this' from the containing basic block and delete it.
| xref:llvm/MachineInstr/explicit_operands-07.adoc[`explicit_operands`] 
| `explicit_operands` overloads
| xref:llvm/MachineInstr/explicit_uses-09.adoc[`explicit_uses`] 
| `explicit_uses` overloads
| xref:llvm/MachineInstr/findFirstPredOperandIdx.adoc[`findFirstPredOperandIdx`] 
| Find the index of the first predicate operand, or ‐1 if none.
| xref:llvm/MachineInstr/findInlineAsmFlagIdx.adoc[`findInlineAsmFlagIdx`] 
| Find the inline‐asm flag‐word operand index for operand `OpIdx.`
| xref:llvm/MachineInstr/findRegisterDefOperand-0f.adoc[`findRegisterDefOperand`] 
| `findRegisterDefOperand` overloads
| xref:llvm/MachineInstr/findRegisterDefOperandIdx.adoc[`findRegisterDefOperandIdx`] 
| Return the operand index that defines `Reg,` or ‐1 if not found.
| xref:llvm/MachineInstr/findRegisterUseOperand-0852.adoc[`findRegisterUseOperand`] 
| `findRegisterUseOperand` overloads
| xref:llvm/MachineInstr/findRegisterUseOperandIdx.adoc[`findRegisterUseOperandIdx`] 
| Return the operand index that uses `Reg,` or ‐1 if not found.
| xref:llvm/MachineInstr/findTiedOperandIdx.adoc[`findTiedOperandIdx`] 
| Return the index of the operand tied to register operand `OpIdx.`
| xref:llvm/GMemOperation/getAlign.adoc[`getAlign`] 
| Return the minimum known alignment in bytes of the actual memory reference.
| xref:llvm/MachineInstr/getAsmPrinterFlag.adoc[`getAsmPrinterFlag`] 
| Return whether AsmPrinter flag `Flag` is set.
| xref:llvm/MachineInstr/getAsmPrinterFlags.adoc[`getAsmPrinterFlags`] 
| Return the asm printer flags bitvector.
| xref:llvm/MachineInstr/getBundleSize.adoc[`getBundleSize`] 
| Return the number of instructions inside this bundle, excluding the header.
| xref:llvm/MachineInstr/getCFIType.adoc[`getCFIType`] 
| Helper to extract a CFI type hash if one has been added.
| xref:llvm/MachineInstr/getDeactivationSymbol.adoc[`getDeactivationSymbol`] 
| Return the deactivation symbol attached to this instruction, if any.
| xref:llvm/MachineInstr/getDebugExpression.adoc[`getDebugExpression`] 
| Return the complex address expression referenced by this DBG_VALUE.
| xref:llvm/MachineInstr/getDebugExpressionOp-0e.adoc[`getDebugExpressionOp`] 
| `getDebugExpressionOp` overloads
| xref:llvm/MachineInstr/getDebugInstrNum-06.adoc[`getDebugInstrNum`] 
| `getDebugInstrNum` overloads
| xref:llvm/MachineInstr/getDebugLabel.adoc[`getDebugLabel`] 
| Return the debug label referenced by this DBG_LABEL instruction.
| xref:llvm/MachineInstr/getDebugLoc.adoc[`getDebugLoc`] 
| Returns the debug location of this MachineInstr.
| xref:llvm/MachineInstr/getDebugOffset-02.adoc[`getDebugOffset`] 
| `getDebugOffset` overloads
| xref:llvm/MachineInstr/getDebugOperand-079.adoc[`getDebugOperand`] 
| `getDebugOperand` overloads
| xref:llvm/MachineInstr/getDebugOperandIndex.adoc[`getDebugOperandIndex`] 
| Return the index of debug operand `Op` within `debug_operands().`
| xref:llvm/MachineInstr/getDebugOperandsForReg-09d.adoc[`getDebugOperandsForReg`] 
| `getDebugOperandsForReg` overloads
| xref:llvm/MachineInstr/getDebugVariable.adoc[`getDebugVariable`] 
| Return the debug variable referenced by this DBG_VALUE instruction.
| xref:llvm/MachineInstr/getDebugVariableOp-09.adoc[`getDebugVariableOp`] 
| `getDebugVariableOp` overloads
| xref:llvm/MachineInstr/getDesc.adoc[`getDesc`] 
| Returns the target instruction descriptor of this MachineInstr.
| xref:llvm/GAnyLoad/getDstReg.adoc[`getDstReg`] 
| Get the definition register of the loaded value.
| xref:llvm/MachineInstr/getFirst2LLTs.adoc[`getFirst2LLTs`] 
| Return the LLTs of the first two operands.
| xref:llvm/MachineInstr/getFirst2RegLLTs.adoc[`getFirst2RegLLTs`] 
| Return the registers and LLTs of the first two operands.
| xref:llvm/MachineInstr/getFirst2Regs.adoc[`getFirst2Regs`] 
| Return the registers of the first two operands.
| xref:llvm/MachineInstr/getFirst3LLTs.adoc[`getFirst3LLTs`] 
| Return the LLTs of the first three operands.
| xref:llvm/MachineInstr/getFirst3RegLLTs.adoc[`getFirst3RegLLTs`] 
| Return the registers and LLTs of the first three operands.
| xref:llvm/MachineInstr/getFirst3Regs.adoc[`getFirst3Regs`] 
| Return the registers of the first three operands.
| xref:llvm/MachineInstr/getFirst4LLTs.adoc[`getFirst4LLTs`] 
| Return the LLTs of the first four operands.
| xref:llvm/MachineInstr/getFirst4RegLLTs.adoc[`getFirst4RegLLTs`] 
| Return the registers and LLTs of the first four operands.
| xref:llvm/MachineInstr/getFirst4Regs.adoc[`getFirst4Regs`] 
| Return the registers of the first four operands.
| xref:llvm/MachineInstr/getFirst5LLTs.adoc[`getFirst5LLTs`] 
| Return the LLTs of the first five operands.
| xref:llvm/MachineInstr/getFirst5RegLLTs.adoc[`getFirst5RegLLTs`] 
| Return the registers and LLTs of the first five operands.
| xref:llvm/MachineInstr/getFirst5Regs.adoc[`getFirst5Regs`] 
| Return the registers of the first five operands.
| xref:llvm/MachineInstr/getFlag.adoc[`getFlag`] 
| Return whether MI flag `Flag` is set.
| xref:llvm/MachineInstr/getFlags.adoc[`getFlags`] 
| Return the MI flags bitvector.
| xref:llvm/MachineInstr/getFoldedRestoreSize.adoc[`getFoldedRestoreSize`] 
| Return a valid size if the instruction is a folded restore instruction.
| xref:llvm/MachineInstr/getFoldedSpillSize.adoc[`getFoldedSpillSize`] 
| Return a valid size if the instruction is a folded spill instruction.
| xref:llvm/MachineInstr/getHeapAllocMarker.adoc[`getHeapAllocMarker`] 
| Helper to extract a heap alloc marker if one has been added.
| xref:llvm/MachineInstr/getInlineAsmDialect.adoc[`getInlineAsmDialect`] 
| Return the inline assembly dialect used by this instruction.
| xref:llvm/MachineInstr/getLocCookieMD.adoc[`getLocCookieMD`] 
| For inline asm, return the !srcloc metadata node if present.
| xref:llvm/MachineInstr/getMF-01.adoc[`getMF`] 
| `getMF` overloads
| xref:llvm/GMemOperation/getMMO.adoc[`getMMO`] 
| Get the MachineMemOperand on this instruction.
| xref:llvm/MachineInstr/getMMRAMetadata.adoc[`getMMRAMetadata`] 
| Helper to extract mmra.op metadata.
| xref:llvm/GAnyLoad/getMemCacheHint.adoc[`getMemCacheHint`] 
| Returns the cache hint metadata for this load.
| xref:llvm/GMemOperation/getMemSize.adoc[`getMemSize`] 
| Returns the size in bytes of the memory access.
| xref:llvm/GMemOperation/getMemSizeInBits.adoc[`getMemSizeInBits`] 
| Returns the size in bits of the memory access.
| xref:llvm/MachineInstr/getNextNode-07.adoc[`getNextNode`] 
| Get the next node, or `nullptr` for the list tail.
| xref:llvm/MachineInstr/getNumDebugOperands.adoc[`getNumDebugOperands`] 
| Returns the total number of operands which are debug locations.
| xref:llvm/MachineInstr/getNumDefs.adoc[`getNumDefs`] 
| Returns the total number of definitions (explicit and implicit).
| xref:llvm/MachineInstr/getNumExplicitDefs.adoc[`getNumExplicitDefs`] 
| Returns the number of non‐implicit definitions.
| xref:llvm/MachineInstr/getNumExplicitOperands.adoc[`getNumExplicitOperands`] 
| Returns the number of non‐implicit operands.
| xref:llvm/MachineInstr/getNumImplicitOperands.adoc[`getNumImplicitOperands`] 
| Returns the number of implicit operands.
| xref:llvm/MachineInstr/getNumMemOperands.adoc[`getNumMemOperands`] 
| Return the number of memory operands.
| xref:llvm/MachineInstr/getNumOperands.adoc[`getNumOperands`] 
| Return the total number of operands.
| xref:llvm/MachineInstr/getOpcode.adoc[`getOpcode`] 
| Returns the opcode of this MachineInstr.
| xref:llvm/MachineInstr/getOperand-03.adoc[`getOperand`] 
| `getOperand` overloads
| xref:llvm/MachineInstr/getOperandNo.adoc[`getOperandNo`] 
| Return the operand index corresponding to iterator `I.`
| xref:llvm/MachineInstr/getPCSections.adoc[`getPCSections`] 
| Helper to extract PCSections metadata target sections.
| xref:llvm/MachineInstr/getParent-0b.adoc[`getParent`] 
| `getParent` overloads
| xref:llvm/GLoadStore/getPointerReg.adoc[`getPointerReg`] 
| Get the source register of the pointer value.
| xref:llvm/MachineInstr/getPostInstrSymbol.adoc[`getPostInstrSymbol`] 
| Helper to extract a post‐instruction symbol if one has been added.
| xref:llvm/MachineInstr/getPreInstrSymbol.adoc[`getPreInstrSymbol`] 
| Helper to extract a pre‐instruction symbol if one has been added.
| xref:llvm/MachineInstr/getPrevNode-00.adoc[`getPrevNode`] 
| `getPrevNode` overloads
| xref:llvm/GAnyLoad/getRanges.adoc[`getRanges`] 
| Returns the Ranges that describes the dereference.
| xref:llvm/GenericMachineInstr/getReg.adoc[`getReg`] 
| Access the Idx'th operand as a register and return it.
| xref:llvm/MachineInstr/getRegClassConstraint.adoc[`getRegClassConstraint`] 
| Compute the static register class constraint for operand `OpIdx.`
| xref:llvm/MachineInstr/getRegClassConstraintEffect.adoc[`getRegClassConstraintEffect`] 
| Apply operand `OpIdx's` constraints to register class `CurRC.`
| xref:llvm/MachineInstr/getRegClassConstraintEffectForVReg.adoc[`getRegClassConstraintEffectForVReg`] 
| Apply this instruction's constraints on `Reg` to class `CurRC.`
| xref:llvm/MachineInstr/getRestoreSize.adoc[`getRestoreSize`] 
| Return a valid size if the instruction is a restore instruction.
| xref:llvm/MachineInstr/getSpillSize.adoc[`getSpillSize`] 
| Return a valid size if the instruction is a spill instruction.
| xref:llvm/MachineInstr/getTypeToPrint.adoc[`getTypeToPrint`] 
| Debugging support @{ Determine the generic type to print for operand `OpIdx,` if needed.
| xref:llvm/MachineInstr/hasComplexRegisterTies.adoc[`hasComplexRegisterTies`] 
| Return true if this instruction has ties not implied by its descriptor.
| xref:llvm/MachineInstr/hasDebugOperandForReg.adoc[`hasDebugOperandForReg`] 
| Return true if this debug value has a debug operand using `Reg.`
| xref:llvm/MachineInstr/hasDelaySlot.adoc[`hasDelaySlot`] 
| Return true if this instruction has a delay slot that must be filled.
| xref:llvm/MachineInstr/hasExtraDefRegAllocReq.adoc[`hasExtraDefRegAllocReq`] 
| Return true if defs have special regalloc requirements beyond classes.
| xref:llvm/MachineInstr/hasExtraSrcRegAllocReq.adoc[`hasExtraSrcRegAllocReq`] 
| Return true if sources have special regalloc requirements beyond classes.
| xref:llvm/MachineInstr/hasImplicitDef.adoc[`hasImplicitDef`] 
| Returns true if the instruction has an implicit definition.
| xref:llvm/MachineInstr/hasOneMemOperand.adoc[`hasOneMemOperand`] 
| Return true if this instruction has exactly one MachineMemOperand.
| xref:llvm/MachineInstr/hasOptionalDef.adoc[`hasOptionalDef`] 
| Return true if this instruction has an optional definition.
| xref:llvm/MachineInstr/hasOrderedMemoryRef.adoc[`hasOrderedMemoryRef`] 
| Return true if this may have an ordered/volatile memory reference.
| xref:llvm/GenericMachineInstr/hasPoisonGeneratingFlags.adoc[`hasPoisonGeneratingFlags`] 
| Return true if this instruction has any poison‐generating flags set.
| xref:llvm/MachineInstr/hasPostISelHook.adoc[`hasPostISelHook`] 
| Return true if this instruction needs a post‐ISel target adjustment hook.
| xref:llvm/MachineInstr/hasProperty.adoc[`hasProperty`] 
| Return true if this instruction (or its bundle) has property `MCFlag.`
| xref:llvm/MachineInstr/hasRegisterImplicitUseOperand.adoc[`hasRegisterImplicitUseOperand`] 
| Return true if there is an implicit use of exactly register `Reg.`
| xref:llvm/MachineInstr/hasUnmodeledSideEffects.adoc[`hasUnmodeledSideEffects`] 
| Return true if this instruction has side effects beyond mayLoad/mayStore.
| xref:llvm/MachineInstr/implicit_operands-0b.adoc[`implicit_operands`] 
| `implicit_operands` overloads
| xref:llvm/MachineInstr/insert.adoc[`insert`] 
| Insert operands `Ops` before iterator `InsertBefore.`
| xref:llvm/MachineInstr/isAnnotationLabel.adoc[`isAnnotationLabel`] 
| Return true if this is an ANNOTATION_LABEL instruction.
| xref:llvm/MachineInstr/isAsCheapAsAMove.adoc[`isAsCheapAsAMove`] 
| Return true if this instruction costs no more than a move.
| xref:llvm/GMemOperation/isAtomic.adoc[`isAtomic`] 
| Returns true if the attached MachineMemOperand has the atomic flag set.
| xref:llvm/MachineInstr/isBarrier.adoc[`isBarrier`] 
| Return true if this instruction stops fall‐through to the next instruction.
| xref:llvm/MachineInstr/isBitcast.adoc[`isBitcast`] 
| Return true if this instruction is a bitcast instruction.
| xref:llvm/MachineInstr/isBranch.adoc[`isBranch`] 
| Return true if this is a conditional, unconditional, or indirect branch.
| xref:llvm/MachineInstr/isBundle.adoc[`isBundle`] 
| Return true if this is a BUNDLE header instruction.
| xref:llvm/MachineInstr/isBundled.adoc[`isBundled`] 
| Return true if this instruction is part of a bundle.
| xref:llvm/MachineInstr/isBundledWithPred.adoc[`isBundledWithPred`] 
| Return true if this instruction is bundled with a predecessor.
| xref:llvm/MachineInstr/isBundledWithSucc.adoc[`isBundledWithSucc`] 
| Return true if this instruction is bundled with a successor.
| xref:llvm/MachineInstr/isCFIInstruction.adoc[`isCFIInstruction`] 
| Return true if this is a CFI_INSTRUCTION.
| xref:llvm/MachineInstr/isCall.adoc[`isCall`] 
| Return true if this is a call instruction.
| xref:llvm/MachineInstr/isCandidateForAdditionalCallInfo.adoc[`isCandidateForAdditionalCallInfo`] 
| Return true if this call may have additional call‐site information.
| xref:llvm/MachineInstr/isCommutable.adoc[`isCommutable`] 
| Return true if this instruction may be commutable (swap source operands).
| xref:llvm/MachineInstr/isCompare.adoc[`isCompare`] 
| Return true if this instruction is a comparison.
| xref:llvm/MachineInstr/isConditionalBranch.adoc[`isConditionalBranch`] 
| Return true if this branch may fall through or transfer to another block.
| xref:llvm/MachineInstr/isConstantValuePHI.adoc[`isConstantValuePHI`] 
| If this PHI always merges the same virtual register, return that register.
| xref:llvm/MachineInstr/isConvergent.adoc[`isConvergent`] 
| Return true if this instruction is convergent.
| xref:llvm/MachineInstr/isConvertibleTo3Addr.adoc[`isConvertibleTo3Addr`] 
| Return true if this 2‐address instruction can become 3‐address if needed.
| xref:llvm/MachineInstr/isCopy.adoc[`isCopy`] 
| Return true if this is a COPY instruction.
| xref:llvm/MachineInstr/isCopyLaneMask.adoc[`isCopyLaneMask`] 
| Return true if this is a COPY_LANEMASK instruction.
| xref:llvm/MachineInstr/isCopyLike.adoc[`isCopyLike`] 
| Return true if this instruction behaves like a copy (excluding COPY).
| xref:llvm/MachineInstr/isDead.adoc[`isDead`] 
| Return true if this instruction is dead.
| xref:llvm/MachineInstr/isDebugEntryValue.adoc[`isDebugEntryValue`] 
| Return true if this DBG_VALUE is an entry value expression.
| xref:llvm/MachineInstr/isDebugInstr.adoc[`isDebugInstr`] 
| Return true if this is any kind of debug instruction.
| xref:llvm/MachineInstr/isDebugLabel.adoc[`isDebugLabel`] 
| Return true if this instruction's opcode is DBG_LABEL.
| xref:llvm/MachineInstr/isDebugOffsetImm.adoc[`isDebugOffsetImm`] 
| Return true if this non‐list DBG_VALUE has an immediate offset operand.
| xref:llvm/MachineInstr/isDebugOperand.adoc[`isDebugOperand`] 
| Return true if `Op` is one of this instruction's debug operands.
| xref:llvm/MachineInstr/isDebugOrPseudoInstr.adoc[`isDebugOrPseudoInstr`] 
| Return true if this is a debug instruction or a pseudo probe.
| xref:llvm/MachineInstr/isDebugPHI.adoc[`isDebugPHI`] 
| Return true if this is a DBG_PHI instruction.
| xref:llvm/MachineInstr/isDebugRef.adoc[`isDebugRef`] 
| Return true if this instruction's opcode is DBG_INSTR_REF.
| xref:llvm/MachineInstr/isDebugValue.adoc[`isDebugValue`] 
| Return true if the instruction is a DBG_VALUE or DBG_VALUE_LIST.
| xref:llvm/MachineInstr/isDebugValueLike.adoc[`isDebugValueLike`] 
| Return true if this is a debug value or debug instruction reference.
| xref:llvm/MachineInstr/isDebugValueList.adoc[`isDebugValueList`] 
| Return true if this is a DBG_VALUE_LIST instruction.
| xref:llvm/MachineInstr/isDereferenceableInvariantLoad.adoc[`isDereferenceableInvariantLoad`] 
| Return true if this load never traps and reads invariant memory.
| xref:llvm/MachineInstr/isEHLabel.adoc[`isEHLabel`] 
| Return true if this is an EH_LABEL instruction.
| xref:llvm/MachineInstr/isEHScopeReturn.adoc[`isEHScopeReturn`] 
| Return true if this marks the end of an EH scope (catchpad/cleanuppad).
| xref:llvm/MachineInstr/isEquivalentDbgInstr.adoc[`isEquivalentDbgInstr`] 
| Return true if this debug instruction represents the same value as `Other.`
| xref:llvm/MachineInstr/isExtractSubreg.adoc[`isExtractSubreg`] 
| Return true if this is an EXTRACT_SUBREG instruction.
| xref:llvm/MachineInstr/isExtractSubregLike.adoc[`isExtractSubregLike`] 
| Return true if this behaves like a generic EXTRACT_SUBREG.
| xref:llvm/MachineInstr/isFakeUse.adoc[`isFakeUse`] 
| Return true if this is a FAKE_USE instruction.
| xref:llvm/MachineInstr/isFullCopy.adoc[`isFullCopy`] 
| Return true if this is a COPY with no subregister on either operand.
| xref:llvm/MachineInstr/isGCLabel.adoc[`isGCLabel`] 
| Return true if this is a GC_LABEL instruction.
| xref:llvm/MachineInstr/isIdenticalTo.adoc[`isIdenticalTo`] 
| Return true if this instruction is identical to `Other.`
| xref:llvm/MachineInstr/isIdentityCopy.adoc[`isIdentityCopy`] 
| Return true if this is an identity copy (same reg and subreg).
| xref:llvm/MachineInstr/isImplicitDef.adoc[`isImplicitDef`] 
| Return true if this is an IMPLICIT_DEF instruction.
| xref:llvm/MachineInstr/isIndirectBranch.adoc[`isIndirectBranch`] 
| Return true if this is an indirect branch (e.g. through a register).
| xref:llvm/MachineInstr/isIndirectDebugValue.adoc[`isIndirectDebugValue`] 
| Return true if this DBG_VALUE is indirect (reg location + imm offset).
| xref:llvm/MachineInstr/isInlineAsm.adoc[`isInlineAsm`] 
| Return true if this is an INLINEASM or INLINEASM_BR instruction.
| xref:llvm/MachineInstr/isInsertSubreg.adoc[`isInsertSubreg`] 
| Return true if this is an INSERT_SUBREG instruction.
| xref:llvm/MachineInstr/isInsertSubregLike.adoc[`isInsertSubregLike`] 
| Return true if this behaves like a generic INSERT_SUBREG.
| xref:llvm/MachineInstr/isInsideBundle.adoc[`isInsideBundle`] 
| Return true if MI is in a bundle (but not the first MI in a bundle).
| xref:llvm/MachineInstr/isJumpTableDebugInfo.adoc[`isJumpTableDebugInfo`] 
| Return true if this is a JUMP_TABLE_DEBUG_INFO instruction.
| xref:llvm/MachineInstr/isKill.adoc[`isKill`] 
| Return true if this is a KILL instruction.
| xref:llvm/MachineInstr/isLabel.adoc[`isLabel`] 
| Returns true if the MachineInstr represents a label.
| xref:llvm/MachineInstr/isLifetimeMarker.adoc[`isLifetimeMarker`] 
| Return true if this is a LIFETIME_START or LIFETIME_END marker.
| xref:llvm/MachineInstr/isLoadFoldBarrier.adoc[`isLoadFoldBarrier`] 
| Returns true if it is illegal to fold a load across this instruction.
| xref:llvm/MachineInstr/isMetaInstruction.adoc[`isMetaInstruction`] 
| Return true if this instruction produces no executable output.
| xref:llvm/MachineInstr/isMoveImmediate.adoc[`isMoveImmediate`] 
| Return true if this is a move‐immediate (including conditional moves).
| xref:llvm/MachineInstr/isMoveReg.adoc[`isMoveReg`] 
| Return true if this instruction is a register move.
| xref:llvm/MachineInstr/isNonListDebugValue.adoc[`isNonListDebugValue`] 
| Return true if this is a non‐list DBG_VALUE instruction.
| xref:llvm/MachineInstr/isNotDuplicable.adoc[`isNotDuplicable`] 
| Return true if this instruction cannot be safely duplicated.
| xref:llvm/MachineInstr/isOperandSubregIdx.adoc[`isOperandSubregIdx`] 
| Return true if operand `OpIdx` is a subregister index.
| xref:llvm/MachineInstr/isPHI.adoc[`isPHI`] 
| Return true if this is a PHI or G_PHI instruction.
| xref:llvm/MachineInstr/isPosition.adoc[`isPosition`] 
| Return true if the instruction marks a position in the function.
| xref:llvm/MachineInstr/isPreISelOpcode.adoc[`isPreISelOpcode`] 
| Return true if this opcode should go through usual legalization steps.
| xref:llvm/MachineInstr/isPredicable.adoc[`isPredicable`] 
| Return true if this instruction has a predicate operand.
| xref:llvm/MachineInstr/isPseudo.adoc[`isPseudo`] 
| Return true if this is a pseudo instruction (not a real machine insn).
| xref:llvm/MachineInstr/isPseudoProbe.adoc[`isPseudoProbe`] 
| Return true if this is a PSEUDO_PROBE instruction.
| xref:llvm/MachineInstr/isRegSequence.adoc[`isRegSequence`] 
| Return true if this is a REG_SEQUENCE instruction.
| xref:llvm/MachineInstr/isRegSequenceLike.adoc[`isRegSequenceLike`] 
| Return true if this behaves like a generic REG_SEQUENCE.
| xref:llvm/MachineInstr/isRegTiedToDefOperand.adoc[`isRegTiedToDefOperand`] 
| Return true if use operand `UseOpIdx` is tied to a def operand.
| xref:llvm/MachineInstr/isRegTiedToUseOperand.adoc[`isRegTiedToUseOperand`] 
| Return true if def operand `DefOpIdx` is tied to a use operand.
| xref:llvm/MachineInstr/isRematerializable.adoc[`isRematerializable`] 
| Return true if this instruction is a rematerialization candidate.
| xref:llvm/MachineInstr/isReturn.adoc[`isReturn`] 
| Return true if this is a return instruction.
| xref:llvm/MachineInstr/isSafeToMove.adoc[`isSafeToMove`] 
| Return true if it is safe to move this instruction.
| xref:llvm/MachineInstr/isSelect.adoc[`isSelect`] 
| Return true if this instruction is a select instruction.
| xref:llvm/GMemOperation/isSimple.adoc[`isSimple`] 
| Returns true if the memory operation is neither atomic or volatile.
| xref:llvm/MachineInstr/isStackAligningInlineAsm.adoc[`isStackAligningInlineAsm`] 
| Return true if this is inline asm that requests stack alignment.
| xref:llvm/MachineInstr/isSubregToReg.adoc[`isSubregToReg`] 
| Return true if this is a SUBREG_TO_REG instruction.
| xref:llvm/MachineInstr/isTerminator.adoc[`isTerminator`] 
| Return true if this instruction is part of a basic‐block terminator.
| xref:llvm/MachineInstr/isTransient.adoc[`isTransient`] 
| Return true if this instruction is transient (likely eliminated / free).
| xref:llvm/MachineInstr/isUnconditionalBranch.adoc[`isUnconditionalBranch`] 
| Return true if this branch always transfers control to another block.
| xref:llvm/MachineInstr/isUndefDebugValue.adoc[`isUndefDebugValue`] 
| Return true if this debug value describes part of a variable as unavailable.
| xref:llvm/GMemOperation/isUnordered.adoc[`isUnordered`] 
| Return true if this memory operation is unordered.
| xref:llvm/MachineInstr/isVariadic.adoc[`isVariadic`] 
| Return true if this instruction can have a variable number of operands.
| xref:llvm/GMemOperation/isVolatile.adoc[`isVolatile`] 
| Returns true if the attached MachineMemOpeand as the volatile flag set.
| xref:llvm/MachineInstr/killsRegister.adoc[`killsRegister`] 
| Return true if this instruction kills `Reg.`
| xref:llvm/MachineInstr/mayAlias-03.adoc[`mayAlias`] 
| `mayAlias` overloads
| xref:llvm/MachineInstr/mayFoldInlineAsmRegOp.adoc[`mayFoldInlineAsmRegOp`] 
| Return true if register operand `OpId` may fold into a frame index.
| xref:llvm/MachineInstr/mayLoad.adoc[`mayLoad`] 
| Return true if this instruction could possibly read memory.
| xref:llvm/MachineInstr/mayLoadOrStore.adoc[`mayLoadOrStore`] 
| Return true if this instruction could possibly read or modify memory.
| xref:llvm/MachineInstr/mayRaiseFPException.adoc[`mayRaiseFPException`] 
| Return true if this instruction could raise a floating‐point exception.
| xref:llvm/MachineInstr/mayStore.adoc[`mayStore`] 
| Return true if this instruction could possibly modify memory.
| xref:llvm/MachineInstr/memoperands.adoc[`memoperands`] 
| Return this instruction's memory operands.
| xref:llvm/MachineInstr/memoperands_begin.adoc[`memoperands_begin`] 
| Return a begin iterator over this instruction's memory operands.
| xref:llvm/MachineInstr/memoperands_empty.adoc[`memoperands_empty`] 
| Return true if this instruction has no describing memory operands.
| xref:llvm/MachineInstr/memoperands_end.adoc[`memoperands_end`] 
| Return a past‐the‐end iterator over this instruction's memory operands.
| xref:llvm/MachineInstr/mergeFlagsWith.adoc[`mergeFlagsWith`] 
| Return the MIFlags that represent both this instruction and `Other.`
| xref:llvm/MachineInstr/modifiesRegister.adoc[`modifiesRegister`] 
| Return true if this instruction modifies (fully or partially) `Reg.`
| xref:llvm/MachineInstr/moveBefore.adoc[`moveBefore`] 
| Move this instruction before `MovePos.`
| xref:llvm/MachineInstr/operands-09.adoc[`operands`] 
| `operands` overloads
| xref:llvm/MachineInstr/operands_begin-06.adoc[`operands_begin`] 
| `operands_begin` overloads
| xref:llvm/MachineInstr/operands_end-075.adoc[`operands_end`] 
| `operands_end` overloads
| xref:llvm/MachineInstr/peekDebugInstrNum.adoc[`peekDebugInstrNum`] 
| Examine this instruction's debug number without assigning one.
| xref:llvm/MachineInstr/print-04.adoc[`print`] 
| `print` overloads
| xref:llvm/MachineInstr/readsRegister.adoc[`readsRegister`] 
| Return true if this instruction reads `Reg.`
| xref:llvm/MachineInstr/readsVirtualRegister.adoc[`readsVirtualRegister`] 
| Return true if this instruction reads virtual register `Reg.`
| xref:llvm/MachineInstr/readsWritesVirtualRegister.adoc[`readsWritesVirtualRegister`] 
| Return whether this instruction reads and/or writes virtual register `Reg.`
| xref:llvm/MachineInstr/registerDefIsDead.adoc[`registerDefIsDead`] 
| Return true if `Reg` is dead in this instruction.
| xref:llvm/MachineInstr/removeFromBundle.adoc[`removeFromBundle`] 
| Unlink this instruction from its basic block and return it without deleting it.
| xref:llvm/MachineInstr/removeFromParent.adoc[`removeFromParent`] 
| Unlink this instruction from its basic block and return it without deleting.
| xref:llvm/MachineInstr/removeOperand.adoc[`removeOperand`] 
| Erase operand `OpNo,` leaving the instruction with one fewer operand.
| xref:llvm/MachineInstr/removePHIIncomingValueFor.adoc[`removePHIIncomingValueFor`] 
| Remove all PHI incoming values from basic block `MBB.`
| xref:llvm/MachineInstr/setAsmPrinterFlag.adoc[`setAsmPrinterFlag`] 
| Set AsmPrinter flag `Flag.`
| xref:llvm/MachineInstr/setCFIType.adoc[`setCFIType`] 
| Set the CFI type hash for this instruction.
| xref:llvm/MachineInstr/setDeactivationSymbol.adoc[`setDeactivationSymbol`] 
| Set the deactivation symbol value attached to this instruction.
| xref:llvm/MachineInstr/setDebugInstrNum.adoc[`setDebugInstrNum`] 
| Set this instruction's debug instruction number.
| xref:llvm/MachineInstr/setDebugLoc.adoc[`setDebugLoc`] 
| Replace this instruction's debug location with `DL.`
| xref:llvm/MachineInstr/setDebugValueUndef.adoc[`setDebugValueUndef`] 
| Sets all register debug operands in this debug value instruction to be undef.
| xref:llvm/MachineInstr/setDesc.adoc[`setDesc`] 
| Replace this instruction's descriptor (and thus opcode) with `TID.`
| xref:llvm/MachineInstr/setFlag.adoc[`setFlag`] 
| Set MI flag `Flag.`
| xref:llvm/MachineInstr/setFlags.adoc[`setFlags`] 
| Set MI flags from bitvector `flags,` preserving bundle flags.
| xref:llvm/MachineInstr/setHeapAllocMarker.adoc[`setHeapAllocMarker`] 
| Set a heap‐alloc site marker used to emit labels after ISel/opts.
| xref:llvm/MachineInstr/setMMRAMetadata.adoc[`setMMRAMetadata`] 
| Set mmra.op metadata on this instruction.
| xref:llvm/MachineInstr/setMemRefs.adoc[`setMemRefs`] 
| Assign this instruction's memory reference descriptor list.
| xref:llvm/MachineInstr/setPCSections.adoc[`setPCSections`] 
| Set metadata naming sections that should receive this instruction address.
| xref:llvm/MachineInstr/setPhysRegsDeadExcept.adoc[`setPhysRegsDeadExcept`] 
| Mark every physreg used by this instruction dead except `UsedRegs.`
| xref:llvm/MachineInstr/setPostInstrSymbol.adoc[`setPostInstrSymbol`] 
| Set a symbol emitted immediately after this instruction.
| xref:llvm/MachineInstr/setPreInstrSymbol.adoc[`setPreInstrSymbol`] 
| Set a symbol emitted immediately before this instruction.
| xref:llvm/MachineInstr/setRegisterDefReadUndef.adoc[`setRegisterDefReadUndef`] 
| Mark subregister defs of `Reg` with the undef flag.
| xref:llvm/MachineInstr/shouldUpdateAdditionalCallInfo.adoc[`shouldUpdateAdditionalCallInfo`] 
| Return true if additional call‐site info must be updated for this MI.
| xref:llvm/MachineInstr/substituteRegister.adoc[`substituteRegister`] 
| Replace all occurrences of `FromReg` with `ToRegSubIdx.`
| xref:llvm/MachineInstr/tieOperands.adoc[`tieOperands`] 
| Tie register operands at `DefIdx` and `UseIdx` to the same physreg.
| xref:llvm/MachineInstr/unbundleFromPred.adoc[`unbundleFromPred`] 
| Break bundle above this instruction.
| xref:llvm/MachineInstr/unbundleFromSucc.adoc[`unbundleFromSucc`] 
| Break bundle below this instruction.
| xref:llvm/MachineInstr/untieRegOperand.adoc[`untieRegOperand`] 
| Break any tie involving operand index `OpIdx.`
| xref:llvm/MachineInstr/uses-0f.adoc[`uses`] 
| Return operands that may be register uses (may include non‐reg operands).
| xref:llvm/MachineInstr/usesCustomInsertionHook.adoc[`usesCustomInsertionHook`] 
| Return true if DAG scheduling needs a custom insertion hook for this.
| xref:llvm/MachineInstr/wouldBeTriviallyDead.adoc[`wouldBeTriviallyDead`] 
| Return true if this would be trivially dead if all defined regs were dead.
|===


== Static Member Functions

[cols="1,4"]
|===
| Name| Description
| xref:llvm/GZExtLoad/classof.adoc[`classof`] 
| Methods for support type inquiry through isa, cast, and dyn_cast.
| xref:llvm/MachineInstr/copyFlagsFromInstruction.adoc[`copyFlagsFromInstruction`] 
| Build MIFlags bits corresponding to the IR flags on instruction `I.`
|===


== Non-Member Functions

[cols="1,4"]
|===
| Name| Description
| xref:llvm/AnalyzePhysRegInBundle.adoc[`AnalyzePhysRegInBundle`]
| Analyze how the current instruction or bundle uses a physical register.
| xref:llvm/AnalyzeVirtRegInBundle.adoc[`AnalyzeVirtRegInBundle`]
| Analyze how the current instruction or bundle uses a virtual register.
| xref:llvm/AnalyzeVirtRegLanesInBundle.adoc[`AnalyzeVirtRegLanesInBundle`]
| Return a pair of lane masks (reads, writes) indicating which lanes this instruction uses with Reg.
| xref:llvm/canLowerMemCpyFamily.adoc[`canLowerMemCpyFamily`]
| Matcher for memcpy‐like instructions. For non‐zero lengths, `MemOps` contains the load/store types to emit.
| xref:llvm/const_mi_bundle_ops.adoc[`const_mi_bundle_ops`]
| Return a range over all operands in the const bundle containing `MI.`
| xref:llvm/constrainSelectedInstRegOperands.adoc[`constrainSelectedInstRegOperands`]
| Constrain selected‐instruction operands to the instruction register classes.
| xref:llvm/eraseInstr.adoc[`eraseInstr`]
| Erase a single dead instruction, optionally notifying a debug observer.
| xref:llvm/getIConstantSplatSExtVal-0e.adoc[`getIConstantSplatSExtVal`]
| Return the scalar sign‐extended integral splat value defined by `MI` if possible.
| xref:llvm/getIConstantSplatVal-00.adoc[`getIConstantSplatVal`]
| Return the scalar integral splat value defined by `MI` if possible.
| xref:llvm/getSplatIndex-0b.adoc[`getSplatIndex`]
| Return the splat index of a G_SHUFFLE_VECTOR when it is a splat.
| xref:llvm/getVectorSplat.adoc[`getVectorSplat`]
| Examples:
| xref:llvm/isAllOnesOrAllOnesSplat-00.adoc[`isAllOnesOrAllOnesSplat`]
| Return true if the value is a constant ‐1 integer or a splatted vector of a constant ‐1 integer (with no undefs if `AllowUndefs` is false).
| xref:llvm/isAssertMI.adoc[`isAssertMI`]
| Returns true if the instruction `MI` is one of the assert instructions.
| xref:llvm/isBuildVectorAllOnes.adoc[`isBuildVectorAllOnes`]
| Return true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are ~0 or undef.
| xref:llvm/isBuildVectorAllZeros.adoc[`isBuildVectorAllZeros`]
| Return true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are 0 or undef.
| xref:llvm/isBuildVectorConstantSplat-08.adoc[`isBuildVectorConstantSplat`]
| Return true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are `SplatValue` or undef.
| xref:llvm/isBuildVectorConstantSplat-0c.adoc[`isBuildVectorConstantSplat`]
| Return true if the specified instruction is a G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC where all of the elements are `SplatValue` or undef.
| xref:llvm/isConstantOrConstantVector-05.adoc[`isConstantOrConstantVector`]
| Return true if the specified instruction is known to be a constant, or a vector of constants.
| xref:llvm/isConstantOrConstantVector-08.adoc[`isConstantOrConstantVector`]
| Determines if `MI` defines a constant integer or a build vector of constant integers. Treats undef values as constants.
| xref:llvm/isNullOrNullSplat-0f.adoc[`isNullOrNullSplat`]
| Return true if the value is a constant 0 integer or a null splat.
| xref:llvm/isTriviallyDead.adoc[`isTriviallyDead`]
| Check whether an instruction `MI` is dead: it only defines dead virtual registers, and doesn't have other side effects.
| xref:llvm/mi_bundle_ops.adoc[`mi_bundle_ops`]
| Return a range over all operands in the bundle containing `MI.`
| xref:llvm/phys_regs_and_masks.adoc[`phys_regs_and_masks`]
| Returns an iterator range over all physical register and mask operands for `MI` and bundled instructions. This also skips any debug operands.
| xref:llvm/saveUsesAndErase.adoc[`saveUsesAndErase`]
| Record uses of `MI` and erase it, appending newly dead users to the chain.
| xref:llvm/stableHashValue-00.adoc[`stableHashValue`]
| Compute a stable hash of machine instruction `MI.`
| xref:llvm/updateDbgValueForSpill.adoc[`updateDbgValueForSpill`]
| Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when modifying an instruction in place while iterating over a basic block.
| xref:llvm/GISelAddressing/aliasIsKnownForLoadStore.adoc[`GISelAddressing::aliasIsKnownForLoadStore`]
| Compute whether or not a memory access at `MI1` aliases with an access at `MI2`
| xref:llvm/GISelAddressing/instMayAlias.adoc[`GISelAddressing::instMayAlias`]
| Returns true if the instruction `MI` may alias `Other.`
| xref:llvm/MIPatternMatch/m_GAnyLoad-08.adoc[`MIPatternMatch::m_GAnyLoad`]
| Matches any load, binding the instruction and pointer operand.
| xref:llvm/MIPatternMatch/m_GAnyLoad-0f.adoc[`MIPatternMatch::m_GAnyLoad`]
| Matches any load, binding instruction, pointer, and memoperand.
| xref:llvm/MIPatternMatch/m_MInstr-06.adoc[`MIPatternMatch::m_MInstr`]
| Binds the matched defining instruction to `MI.`
| xref:llvm/MIPatternMatch/m_MInstr-0b.adoc[`MIPatternMatch::m_MInstr`]
| Binds the matched defining instruction to const `MI.`
| xref:llvm/MIPatternMatch/mi_match-00.adoc[`MIPatternMatch::mi_match`]
| Match const machine instruction `MI` against pattern `P.`
| xref:llvm/MIPatternMatch/mi_match-04.adoc[`MIPatternMatch::mi_match`]
| Match machine instruction `MI` against pattern `P.`
|===


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