This is a fast‐path instruction selection class that generates poor code and doesn't support illegal types or non‐trivial lowering, but runs quickly.
Synopsis
Declared in <llvm/CodeGen/FastISel.h>
class FastISel;
Types
Name |
Description |
Holds the information needed to lower a call in FastISel. |
Type Aliases
Name |
Description |
A single argument in a FastISel call argument list. |
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A list of arguments for a call being lowered. |
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Saved insert point for restoring after local‐value emission. |
Member Functions
Name |
Description |
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Destroy the FastISel instance. |
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert position. |
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Flush the local value map. |
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Return current debug location information. |
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Return the position of the last instruction emitted for materializing constants for use in the current block. |
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This is a wrapper around getRegForValue that also takes care of truncating or sign‐extending the given getelementptr index value. |
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Create a virtual register and arrange for it to be assigned the value for the given LLVM value. |
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Target‐independent lowering of non‐instruction debug info associated with this instruction. |
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Reset InsertPt to the given old insert position. |
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Look up the value to see if its value is already cached in a register. It may be defined by instructions across blocks or defined locally. |
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Do "fast" instruction selection for function arguments and append the machine instructions to the current block. Returns true when successful. |
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Reset InsertPt to prepare for inserting instructions into the current block. |
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Remove all dead instructions between the I and E. |
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Select an LLVM IR instruction into the current machine block. |
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Select an LLVM IR operator into the current machine block. |
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Update the position of the last instruction emitted for materializing constants for use in the current block. |
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Set the current block to which generated machine instructions will be appended. |
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Try to fold a load into a later instruction. |
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Try to fold a load into an operand of a machine instruction. |
Protected Member Functions
Name |
Description |
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Construct a FastISel for the given function lowering state. |
Check if |
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Constrain a register operand to the class an instruction requires. |
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Create a machine mem operand from the given instruction. |
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Create a virtual register in the given register class. |
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Emit an unconditional branch to the given block, unless it is the immediate (fall‐through) successor, and update the CFG. |
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Emit a MachineInstr with no operands and a result register in the given register class. |
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Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified type. |
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Emit a MachineInstr with a floating point immediate, and a result register in the given register class. |
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Emit a MachineInstr with a single immediate operand, and a result register in the given register class. |
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Emit a MachineInstr with one register operand and a result register in the given register class. |
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Emit a MachineInstr with a register operand, an immediate, and a result register in the given register class. |
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Emit a MachineInstr with one register operand and two immediate operands. |
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Emit a MachineInstr with two register operands and a result register in the given register class. |
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Emit a MachineInstr with two register operands, an immediate, and a result register in the given register class. |
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Emit a MachineInstr with three register operands and a result register in the given register class. |
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Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero. |
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This method is called by target‐independent code to request that an instruction with the given type and opcode be emitted. |
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This method is called by target‐independent code to request that an instruction with the given type, opcode, and floating‐point immediate operand be emitted. |
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This method is called by target‐independent code to request that an instruction with the given type, opcode, and immediate operand be emitted. |
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This method is called by target‐independent code to request that an instruction with the given type, opcode, and register operand be emitted. |
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This method is called by target‐independent code to request that an instruction with the given type, opcode, and register and immediate operands be emitted. |
This method is a wrapper of fastEmit_ri. |
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This method is called by target‐independent code to request that an instruction with the given type, opcode, and register operands be emitted. |
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This method is called by target‐independent code to do target‐ specific argument lowering. It returns true if it was successful. |
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This method is called by target‐independent code to do target‐ specific call lowering. It returns true if it was successful. |
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This method is called by target‐independent code to do target‐ specific intrinsic lowering. It returns true if it was successful. |
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Emit an alloca address in a register using target‐specific logic. |
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Emit a constant in a register using target‐specific logic, such as constant pool loads. |
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Emit the floating‐point constant +0.0 in a register using target‐ specific logic. |
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Select an instruction that generic FastISel could not handle. |
Emit an unconditional branch to |
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Lower an IR call instruction. |
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Target‐independent lowering of debug information. Returns false if the debug information couldn't be lowered and was instead discarded. |
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Target‐independent lowering of debug information. Returns false if the debug information couldn't be lowered and was instead discarded. |
Fold a compare of a value against itself to a simpler predicate. |
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Select and emit code for a binary operator instruction, which has an opcode which directly corresponds to the given ISD opcode. |
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Select a bitcast instruction or constant expression. |
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Select a call instruction, including simple inline assembly. |
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Select a cast instruction with the given ISD opcode. |
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Select an extractvalue instruction. |
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Select a floating‐point negation. |
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Select a freeze instruction. |
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Select a getelementptr instruction or constant expression. |
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Select an intrinsic call, or defer it to target‐specific lowering. |
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Select an llvm.experimental.patchpoint intrinsic call. |
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Select an llvm.experimental.stackmap intrinsic call. |
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Select an llvm.xray.customevent intrinsic call. |
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Select an llvm.xray.typedevent intrinsic call. |
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Check whether the function should be optimized for size. |
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Update the value map to include the new mapping for this instruction, or insert an extra copy to get the result in a previous determined register. |
Protected Data Members
Name |
Description |
Data layout of the current module. |
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First instruction in the block that may emit local values. |
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Per‐function lowering state shared with SelectionDAG ISel. |
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Last instruction that materialized a constant in this block. |
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Target library information for the current function. |
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Libcall lowering information for the current target. |
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Map from IR values to registers materialized in the current block. |
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Constant pool for the current machine function. |
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Machine function currently being selected. |
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Frame information for the current machine function. |
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Metadata attached to newly created machine instructions. |
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Register information for the current machine function. |
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If true, skip generic FastISel and use only the target hook. |
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Target instruction information for the current subtarget. |
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Target lowering interface for the current subtarget. |
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Target machine for the current compilation. |
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Target register information for the current subtarget. |
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